公开(公告)号：US6025751A

公开(公告)日：2000-02-15

申请号：US947754

申请日：1997-10-08

申请人： Paul M-Bhor Chiang ,  Chia-Jen Chang ,  Hung-Mao Lin ,  Rita Au Hsu

发明人： Paul M-Bhor Chiang ,  Chia-Jen Chang ,  Hung-Mao Lin ,  Rita Au Hsu

IPC分类号： G11C8/08 ,  G11C11/408 ,  H03M7/162

CPC分类号： G11C11/4085 ,  G11C8/08

摘要： Aspects for self bootstrapping word-line driver circuitry are provided. In a circuit aspect, a word-line driver circuit for a memory cell in a semiconductor memory includes a signal input means, the signal input means comprising a first plurality of transistors, the first plurality of transistors receiving an input voltage signal higher than a voltage supply signal of the semiconductor memory. The circuit further includes a signal output means, the signal output means comprising a second plurality of transistors coupled to the first plurality of transistors and providing an output drive signal sufficient for the memory cell.In a method aspect, a method for providing proper voltage level output of a word-line driver circuit for a semiconductor memory includes forming a self-bootstrap circuit as the word-line driver circuit and providing an input voltage signal to the self-bootstrap circuit, the input voltage signal acting as a source voltage for the circuit and being higher by a predetermined value than a supply voltage of the semiconductor memory.

摘要翻译： 提供自引导字线驱动电路的方面。 在电路方面，半导体存储器中用于存储单元的字线驱动电路包括信号输入装置，信号输入装置包括第一多个晶体管，第一多个晶体管接收高于电压的输入电压信号 半导体存储器的供给信号。 电路还包括信号输出装置，信号输出装置包括耦合到第一多个晶体管的第二多个晶体管，并提供足以存储存储单元的输出驱动信号。 在方法方面，用于为半导体存储器提供字线驱动电路的适当电压电平输出的方法包括形成自引导电路作为字线驱动电路，并向自引导电路提供输入电压信号 所述输入电压信号用作所述电路的源电压并且比所述半导体存储器的电源电压高预定值。

公开(公告)号：US5898626A

公开(公告)日：1999-04-27

申请号：US879208

申请日：1997-06-19

申请人： Paul M-Bhor Chiang ,  Hung-Mao Lin ,  Chia-Jen Chang

发明人： Paul M-Bhor Chiang ,  Hung-Mao Lin ,  Chia-Jen Chang

IPC分类号： G11C29/00 ,  G11C7/00

CPC分类号： G11C29/83 ,  G11C29/84

摘要： Circuit, method, and system aspects for achieving redundancy circuitry programming in semiconductor memory are provided. Through these aspects, utilization of a circuit including a logic mechanism for receiving an enable signal and an address signal, a switching mechanism coupled to the logic mechanism for controlling delivery of the address signal, and a fuse mechanism coupled to the logic mechanism for allowing selective address programming responsive to the address signal in order to produce a desired logic level for a redundant address output signal occurs to form an address programming circuit. Further, selective input of an enable signal to the address programming circuit provides control of the address programming circuit to produce a desired logic level output. Additionally, integration of a plurality of the address programming circuits to form a redundancy programming circuit is achieved with each address programming circuit corresponding to one bit of an input address signal.

摘要翻译： 提供了用于实现半导体存储器中的冗余电路编程的电路，方法和系统方面。 通过这些方面，利用包括用于接收使能信号和地址信号的逻辑机构的电路，耦合到用于控制地址信号的传送的逻辑机构的开关机构，以及耦合到逻辑机构的熔丝机构， 发生响应于地址信号的地址编程以产生用于冗余地址输出信号的期望逻辑电平以形成地址编程电路。 此外，使能信号向地址编程电路的选择性输入提供地址编程电路的控制以产生期望的逻辑电平输出。 此外，利用对应于输入地址信号的一位的每个地址编程电路来实现多个地址编程电路的集成以形成冗余编程电路。

公开(公告)号：US07940543B2

公开(公告)日：2011-05-10

申请号：US12050950

申请日：2008-03-19

申请人： Chia-Jen Chang ,  Phat Truong

发明人： Chia-Jen Chang ,  Phat Truong

IPC分类号： G11C5/00 ,  G11C7/00

CPC分类号： G11C8/06 ,  G11C7/1072

摘要： A method for dynamically enabling address receivers in a synchronous memory array includes: controlling all address receivers to initially be in an off state; generating a command signal and generating an address signal; delaying the address signal so there is a latency between the command signal and the address signal; and selectively turning on an address receiver corresponding to the address signal when the command signal is received by the synchronous memory array.

摘要翻译： 一种用于动态地使同步存储器阵列中的地址接收器的方法包括：控制所有地址接收器最初处于关闭状态; 生成命令信号并产生地址信号; 延迟地址信号，使得在命令信号和地址信号之间存在延迟; 以及当所述同步存储器阵列接收到所述命令信号时，选择性地接通对应于所述地址信号的地址接收器。

公开(公告)号：US20090257272A1

公开(公告)日：2009-10-15

申请号：US12100424

申请日：2008-04-10

申请人： Benjamin J. Stembridge ,  Chia-Jen Chang

发明人： Benjamin J. Stembridge ,  Chia-Jen Chang

IPC分类号： G11C11/4074 ,  G11C5/14

CPC分类号： G11C11/4074 ,  G11C5/145 ,  G11C8/12 ,  G11C11/4087

摘要： A memory system includes: a memory array, comprising a plurality of memory banks, respectively enabled by a plurality of bank enable signals; a bank selector circuit, for generating the plurality of bank enable signals; a plurality of charge pump components, coupled between the plurality of memory banks and the bank selector circuit, and respectively enabled by the plurality of bank enable signals; and a charge pump circuit, coupled to the plurality of charge pump components, for regulating a supply voltage required by the memory system.

摘要翻译： 存储器系统包括：存储器阵列，包括分别由多个存储体使能信号使能的多个存储体; 存储体选择器电路，用于产生多个存储体使能信号; 耦合在所述多个存储体和所述存储体选择器电路之间并分别由所述多个存储体使能信号使能的多个电荷泵组件; 以及耦合到所述多个电荷泵部件的用于调节所述存储器系统所需的电源电压的电荷泵电路。

公开(公告)号：US09075613B2

公开(公告)日：2015-07-07

申请号：US13278329

申请日：2011-10-21

申请人： Hsin-Chung Chen ,  Chia-Jen Chang

发明人： Hsin-Chung Chen ,  Chia-Jen Chang

IPC分类号： G06F1/32 ,  G06F1/26

CPC分类号： G06F1/3296 ,  G06F1/26 ,  G06F1/324 ,  Y02D10/172

摘要： An exemplary low power consumption circuit includes a microprocessor, a power supply switch module and a main circuit module. The microprocessor is capable of outputting a power control signal and changing a pulse characteristic of the power control signal when the microprocessor switches from a first working mode to a second working mode. The power supply switch module is capable of outputting a power supply signal. The power supply switch module is electrically coupled to the microprocessor to receive the power control signal and thereby modulates a duty cycle of the power supply signal according to a change of the pulse characteristic of the power control signal. The main circuit module is electrically coupled to the power supply switch module to receive the power supply signal and operative with energy provided by the power supply signal. Moreover, a method for reducing power consumption is also provided.

摘要翻译： 示例性的低功耗电路包括微处理器，电源开关模块和主电路模块。 当微处理器从第一工作模式切换到第二工作模式时，微处理器能够输出功率控制信号和改变功率控制信号的脉冲特性。 电源开关模块能够输出电源信号。 电源开关模块电耦合到微处理器以接收功率控制信号，从而根据功率控制信号的脉冲特性的变化来调制电源信号的占空比。 主电路模块电耦合到电源开关模块以接收电源信号并且与由电源信号提供的能量一起工作。 此外，还提供了降低功耗的方法。

公开(公告)号：US07911262B2

公开(公告)日：2011-03-22

申请号：US12413596

申请日：2009-03-29

申请人： Phat Truong ,  Pauline Mai ,  Chia-Jen Chang

发明人： Phat Truong ,  Pauline Mai ,  Chia-Jen Chang

IPC分类号： G05F1/10 ,  G05F3/02

CPC分类号： H03K19/00384

摘要： An integrated circuit includes: a pre-driver stage, coupled to an external supply voltage, for controlling the final driver stage; a final driver stage, coupled to the pre-driver stage and the external supply voltage, for providing an output voltage; a compensation circuit, coupled to the pre-driver stage, for providing a bias voltage to the pre-driver stage that compensates for variation in the external supply voltage, to control current through the pre-driver stage; and a bias circuit, coupled to the external supply voltage and the compensation circuit, for providing a bias voltage as an input to the compensation circuit.

摘要翻译： 集成电路包括：预驱动器级，耦合到外部电源电压，用于控制最终的驱动级; 耦合到预驱动器级和外部电源电压的最终驱动器级，用于提供输出电压; 耦合到预驱动器级的补偿电路，用于向前驱动器级提供偏置电压，其补偿外部电源电压的变化，以控制通过前驱动器级的电流; 以及耦合到外部电源电压和补偿电路的偏置电路，用于提供偏置电压作为对补偿电路的输入。

公开(公告)号：US20070040076A1

公开(公告)日：2007-02-22

申请号：US11198271

申请日：2005-08-08

申请人： Chia-Jen Chang ,  Hao-Che Chang

发明人： Chia-Jen Chang ,  Hao-Che Chang

IPC分类号： F16M11/00

CPC分类号： F16M11/40 ,  B60R11/0235 ,  B60R2011/0084 ,  B60R2011/0089 ,  F16M11/12 ,  F16M11/18 ,  F16M13/02 ,  F16M13/027

摘要： A 3D supporting stand for monitors uses a plastic metal tube to serve as a movable device, such that he plastic metal tube can perform rotation and movement in multiple angles, and is extended into the holding tube for connection. By means of a latching device inside the holding tube, the plastic metal tube can be adjusted with retraction, thereby increasing an agility of the monitor supporting stand, and enabling the entire structure to move to any angle and reach to a desired position, so as to achieve a variation of 3D multiple angles, and to facilitate increasing a comfort upon viewing in compliance with ergonomics. Moreover, when the plastic metal tube is completely retracted into the holding tube, the monitor can be adjusted to be horizontally or vertically embedded into an object attached by the holding tube for collection, thereby saving a space.

摘要翻译： 用于监视器的3D支撑架使用塑料金属管作为可移动装置，使得塑料金属管能够以多个角度执行旋转和移动，并且延伸到用于连接的保持管中。 通过保持管内部的锁定装置，可以通过缩回来调节塑料金属管，从而提高监视器支撑架的灵活性，并使整个结构能够移动到任何角度并达到期望的位置，从而 以实现3D多角度的变化，并且有助于在遵循人体工程学的观看时增加舒适度。 此外，当塑料金属管完全缩回到保持管中时，监视器可以被调节为水平地或垂直地嵌入到由保持管附接的物体中以便收集，从而节省空间。

公开(公告)号：US07749093B1

公开(公告)日：2010-07-06

申请号：US12481187

申请日：2009-06-09

申请人： Chia-Jen Chang ,  Hao-Che Chang

发明人： Chia-Jen Chang ,  Hao-Che Chang

IPC分类号： A63B69/36

CPC分类号： A63B69/3632 ,  A63B53/02 ,  A63B60/50 ,  A63B69/3676

摘要： The present invention discloses a golf club face assistance device. A proper location on a shaft of a club is provided with a first fixing element and is extended with a first assistance element. The other end of the first assistance element is connected with a second fixing element, and the first assistance element is provided with a second assistance element which is extended toward the shaft. An interface between the first and second assistance elements is defined with an aim point, and a virtual club face is defined from the aim point to the club face. By the virtual club face, one can easily learn a correct hitting form and a correct hit point.

摘要翻译： 本发明公开了一种高尔夫球杆面辅助装置。 在杆的轴上的适当位置设置有第一固定元件并且用第一辅助元件延伸。 第一辅助元件的另一端与第二固定元件连接，第一辅助元件设置有向轴延伸的第二辅助元件。 第一和第二辅助元件之间的界面用瞄准点定义，并且从目标点到球杆面定义虚拟球杆面。 通过虚拟俱乐部的面部，可以轻松学习正确的打击形式和正确的命中点。

公开(公告)号：US20090238014A1

公开(公告)日：2009-09-24

申请号：US12050950

申请日：2008-03-19

申请人： Chia-Jen Chang ,  Phat Truong

发明人： Chia-Jen Chang ,  Phat Truong

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C8/06 ,  G11C7/1072

摘要： A method for dynamically enabling address receivers in a synchronous memory array includes: controlling all address receivers to initially be in an off state; generating a command signal and generating an address signal; delaying the address signal so there is a latency between the command signal and the address signal; and selectively turning on an address receiver corresponding to the address signal when the command signal is received by the synchronous memory array.

摘要翻译： 一种用于动态地使同步存储器阵列中的地址接收器的方法包括：控制所有地址接收器最初处于关闭状态; 生成命令信号并产生地址信号; 延迟地址信号，使得在命令信号和地址信号之间存在延迟; 以及当所述同步存储器阵列接收到所述命令信号时，选择性地接通对应于所述地址信号的地址接收器。

公开(公告)号：US08817914B2

公开(公告)日：2014-08-26

申请号：US13219563

申请日：2011-08-26

申请人： Amna Z. Shawwa ,  Chia-Jen Chang

发明人： Amna Z. Shawwa ,  Chia-Jen Chang

IPC分类号： H04L27/00 ,  G11C7/10 ,  H03K5/156

CPC分类号： G11C7/1084 ,  H03K5/1565

摘要： A receiver circuit. A receiving stage is coupled to a first supply voltage and an input signal, and operative to generate a first intermediate signal from the input signal based on the first supply voltage. A compensation stage is coupled to a second supply voltage and the first intermediate signal, and operative to generate a second intermediate signal by adjusting duty cycle of the first intermediate signal upon detecting changes in the first supply voltage to compensate for the changes in the first supply voltage. An outputting stage is coupled to the second supply voltage and operative to generate an output signal based on the second supply voltage upon receiving the second intermediate signal. A voltage of the output signal is adjusted to a level of the second supply voltage and the output signal has a 50% duty cycle.

摘要翻译： 接收机电路。 接收级耦合到第一电源电压和输入信号，并且可操作以基于第一电源电压从输入信号产生第一中间信号。 补偿级耦合到第二电源电压和第一中间信号，并且通过在检测到第一电源电压的变化以补偿第一电源的变化时调整第一中间信号的占空比来产生第二中间信号 电压。 输出级耦合到第二电源电压，并且用于在接收到第二中间信号时基于第二电源电压产生输出信号。 输出信号的电压被调整到第二电源电压的电平，并且输出信号具有50％的占空比。