摘要:
An approach for providing uniformity control in an ion beam etch is described. In one embodiment, there is a method for providing uniform etching in an ion beam based etch process. In this embodiment, an ion beam is directed at a surface of a substrate. The surface of the substrate is etched with the ion beam. The etching is controlled to attain uniformity in the etch of the substrate. The control attains uniformity as a function of at least one ion beam based parameter selected from a plurality of ion beam based parameters.
摘要:
Techniques for depositing metallic films using ion implantation surface modification for catalysis of electroless deposition are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for depositing a metallic film. The method may comprise depositing a catalyzing material on a structure, wherein the structure comprises a substrate, a dielectric layer on the substrate, and a resist layer on the dielectric layer, wherein the dielectric layer and the resist layer have one or more openings. The method may also comprise stripping the resist layer. The method may further comprise depositing a metallic film on the catalyzing material in the one or more openings of the structure to fill the one or more openings.
摘要:
An approach for providing a cleave initiation using a varying ion implant dose is described. In one embodiment, there is a method of forming a substrate. In this embodiment, a semiconductor material is provided and implanted with a spatially varying dose of one or more ion species. A handler substrate is attached to the implanted semiconductor material. A cleave of the implanted semiconductor material is initiated from the handler substrate at a preferential location that is a function of a dose gradient that develops from the spatially varying dose of one or more ion species implanted into the semiconductor material.
摘要:
The present invention provides a method for generating silicon-on-insulator (SOI) wafers that exhibit a high electrical resistivity. In one embodiment of a method according to the teachings of the invention, a SIMOX process is sandwiched between two Full Oxygen Precipitation (FOP) cycles that sequester interstitial oxygen present in the substrate in the form of oxide precipitates, thereby enhancing the electrical resistivity of the susbtrate.
摘要:
The present invention provides methods for forming SOI wafers having internal gettering layers for sequestering metallic impurities. More particularly, in one embodiment of the invention, a plurality of sites for sequestering metallic impurities are formed in a silicon substrate by implanting a selected dose of oxygen ions therein. In one embodiment, an epitaxial layer of crystalline silicon is formed over the substrate, and a buried continuous oxide layer is generated in the epitaxial layer, for example, by employing a SIMOX process.
摘要:
The present invention provides methods for forming SOI wafers having internal gettering layers for sequestering metallic impurities. More particularly, in one embodiment of the invention, a plurality of sites for sequestering metallic impurities are formed in a silicon substrate by implanting a selected dose of oxygen ions therein. In one embodiment, an epitaxial layer of crystalline silicon is formed over the substrate, and a buried continuous oxide layer is generated in the epitaxial layer, for example, by employing a SIMOX process.
摘要:
A method of treating a CMOS device. The method may include providing a first stress liner on a transistor of a first dopant type in the CMOS device. The method may further include exposing the CMOS device to first ions in a first exposure, the first ions configured to reduce contact resistance in a source/drain region of a transistor of a second dopant type.
摘要:
A method of treating a CMOS device. The method may include providing a first stress liner on a transistor of a first dopant type in the CMOS device. The method may further include exposing the CMOS device to first ions in a first exposure, the first ions configured to reduce contact resistance in a source/drain region of a transistor of a second dopant type.
摘要:
An improved method of doping a workpiece is disclosed. In this method, a film comprising the species to be implanted is introduced to the surface of a planar or three-dimensional workpiece. This film can be grown using CVD, a bath or other means. The workpiece with the film is then subjected to ion bombardment to help drive the dopant into the workpiece. This ion bombardment is performed at elevated temperatures to reduce crystal damage and create a more abrupt doped region.
摘要:
An improved method of doping a workpiece is disclosed. In this method, a film comprising the species to be implanted is introduced to the surface of a planar or three-dimensional workpiece. This film can be grown using CVD, a bath or other means. The workpiece with the film is then subjected to ion bombardment to help drive the dopant into the workpiece. This ion bombardment is performed at elevated temperatures to reduce crystal damage and create a more abrupt doped region.