Silicon dioxide removing method
    1.
    发明授权
    Silicon dioxide removing method 失效
    二氧化硅去除方法

    公开(公告)号:US06967167B2

    公开(公告)日:2005-11-22

    申请号:US10605435

    申请日:2003-09-30

    CPC分类号: H01L29/66242 H01L21/31116

    摘要: A method for removing silicon dioxide residuals is disclosed. The method includes reacting a portion of a silicon dioxide layer (i.e., oxide) to form a reaction product layer, removing the reaction product layer and annealing in an environment to remove oxide residuals. The method finds application in a variety of semiconductor fabrication processes including, for example, fabrication of a vertical HBT or silicon-to-silicon interface without an oxide interface.

    摘要翻译: 公开了一种去除二氧化硅残留物的方法。 该方法包括使一部分二氧化硅层(即氧化物)反应以形成反应产物层,除去反应产物层并在环境中退火以除去氧化物残余物。 该方法应用于各种半导体制造工艺中,包括例如制造垂直HBT或无硅氧化物界面的硅 - 硅界面。

    SiGe heterojunction bipolar transistor (HBT)
    2.
    发明授权
    SiGe heterojunction bipolar transistor (HBT) 失效
    SiGe异质结双极晶体管(HBT)

    公开(公告)号:US07317215B2

    公开(公告)日:2008-01-08

    申请号:US10711482

    申请日:2004-09-21

    IPC分类号: H01L29/737

    CPC分类号: H01L29/66242 H01L29/7378

    摘要: A heterojunction bipolar transistor is formed in a semiconductor substrate of a first conductivity type including a collector region. A base region is formed on the substrate and an emitter region is formed over the base region. At least one of the collector, base and emitter regions includes a first region doped with an impurity having a first concentration and a second region doped with the impurity having a second concentration. Noise performance and reliability of the heterojunction bipolar transistor is improved without degrading ac performance.

    摘要翻译: 在包括集电极区域的第一导电类型的半导体衬底中形成异质结双极晶体管。 在基板上形成基极区域,在基极区域上形成发射极区域。 集电极,基极和发射极区域中的至少一个包括掺杂有第一浓度的杂质的第一区域和掺杂有第二浓度的杂质的第二区域。 提高异质结双极晶体管的噪声性能和可靠性,而不会降低交流性能。

    SIGE HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) AND METHOD OF FABRICATION
    3.
    发明申请
    SIGE HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) AND METHOD OF FABRICATION 失效
    信号异常双极晶体管(HBT)和制造方法

    公开(公告)号:US20080124882A1

    公开(公告)日:2008-05-29

    申请号:US11937534

    申请日:2007-11-09

    IPC分类号: H01L21/331

    CPC分类号: H01L29/66242 H01L29/7378

    摘要: A heterojunction bipolar transistor is formed in a semiconductor substrate of a first conductivity type including a collector region. A base region is formed on the substrate and an emitter region is formed over the base region. At least one of the collector, base and emitter regions includes a first region doped with an impurity having a first concentration and a second region doped with the impurity having a second concentration. Noise performance and reliability of the heterojunction bipolar transistor is improved without degrading ac performance.

    摘要翻译: 在包括集电极区域的第一导电类型的半导体衬底中形成异质结双极晶体管。 在基板上形成基极区域,在基极区域上形成发射极区域。 集电极,基极和发射极区域中的至少一个包括掺杂有第一浓度的杂质的第一区域和掺杂有第二浓度的杂质的第二区域。 提高异质结双极晶体管的噪声性能和可靠性,而不会降低交流性能。

    Method of fabrication for SiGe heterojunction bipolar transistor (HBT)
    4.
    发明授权
    Method of fabrication for SiGe heterojunction bipolar transistor (HBT) 失效
    SiGe异质结双极晶体管(HBT)制造方法

    公开(公告)号:US07538004B2

    公开(公告)日:2009-05-26

    申请号:US11937534

    申请日:2007-11-09

    IPC分类号: H01L21/331

    CPC分类号: H01L29/66242 H01L29/7378

    摘要: A heterojunction bipolar transistor is formed in a semiconductor substrate of a first conductivity type including a collector region. A base region is formed on the substrate and an emitter region is formed over the base region. At least one of the collector, base and emitter regions includes a first region doped with an impurity having a first concentration and a second region doped with the impurity having a second concentration. Noise performance and reliability of the heterojunction bipolar transistor is improved without degrading ac performance.

    摘要翻译: 在包括集电极区域的第一导电类型的半导体衬底中形成异质结双极晶体管。 在基板上形成基极区域,在基极区域上形成发射极区域。 集电极,基极和发射极区域中的至少一个包括掺杂有第一浓度的杂质的第一区域和掺杂有第二浓度的杂质的第二区域。 提高异质结双极晶体管的噪声性能和可靠性,而不会降低交流性能。

    Method of base formation in a BiCMOS process
    5.
    发明授权
    Method of base formation in a BiCMOS process 有权
    BiCMOS工艺中碱形成的方法

    公开(公告)号:US07625792B2

    公开(公告)日:2009-12-01

    申请号:US10599938

    申请日:2005-04-06

    IPC分类号: H01L21/8238

    摘要: Disclosed is a bipolar complementary metal oxide semiconductor (BiCMOS) or NPN/PNP device that has a collector, an intrinsic base above the collector, shallow trench isolation regions adjacent the collector, a raised extrinsic base above the intrinsic base, a T-shaped emitter above the extrinsic base, spacers adjacent the emitter, and a silicide layer that is separated from the emitter by the spacers.

    摘要翻译: 公开了一种双极互补金属氧化物半导体(BiCMOS)或NPN / PNP器件,其具有集电极,集电极之上的本征基极,与集电极相邻的浅沟槽隔离区,在本征基极之上的凸起的外部基极,T形发射极 在外部基极之上,邻近发射极的间隔物和通过间隔物与发射极分离的硅化物层。

    Method of collector formation in BiCMOS technology
    6.
    发明授权
    Method of collector formation in BiCMOS technology 有权
    BiCMOS技术中收集器形成的方法

    公开(公告)号:US07491985B2

    公开(公告)日:2009-02-17

    申请号:US11288843

    申请日:2005-11-29

    摘要: A heterobipolar transistor (HBT) for high-speed BiCMOS applications is provided in which the collector resistance, Rc, is lowered by providing a buried refractory metal silicide layer underneath the shallow trench isolation region on the subcollector of the device. Specifically, the HBT of the present invention includes a substrate including at least a subcollector; a buried refractory metal silicide layer located on the subcollector; and a shallow trench isolation region located on a surface of the buried refractory metal silicide layer. The present invention also provides a method of fabricating such a HBT. The method includes forming a buried refractory metal silicide underneath the shallow trench isolation region on the subcollector of the device.

    摘要翻译: 提供了用于高速BiCMOS应用的异步双极晶体管(HBT),其中通过在器件的子集电极上的浅沟槽隔离区域的下面提供掩埋难熔金属硅化物层来降低集电极电阻Rc。 具体地,本发明的HBT包括至少包括子集电极的基板; 位于子集电极上的埋置难熔金属硅化物层; 以及位于掩埋难熔金属硅化物层的表面上的浅沟槽隔离区域。 本发明还提供一种制造这种HBT的方法。 该方法包括在器件的子集电极上的浅沟槽隔离区域的下面形成埋置难熔金属硅化物。

    Semiconductor structure and method of manufacture
    9.
    发明授权
    Semiconductor structure and method of manufacture 有权
    半导体结构及制造方法

    公开(公告)号:US08022496B2

    公开(公告)日:2011-09-20

    申请号:US11873696

    申请日:2007-10-17

    IPC分类号: H01L29/47

    摘要: A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

    摘要翻译: 一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。 还可以设想一种方法,其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。 该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。 第二掺杂区形成在与第一掺杂区不同的深度。 该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。