-
公开(公告)号：US11206012B2
公开(公告)日：2021-12-21
申请号：US17101685
申请日：2020-11-23
Applicant: QUALCOMM Incorporated
IPC: H03K3/012 , G11C11/4093 , H03K17/687 , H03F3/45
Abstract: A data transmitter includes: a plurality of parallel driver slices, a first slice of the plurality of parallel driver slices having a first signal generator circuit with a first transistor coupled to a data signal and in series with a second transistor coupled to a first bias signal; and a first bias circuit including a third transistor and a fourth transistor in series with a first current source, the first bias circuit further including a first operational amplifier (op amp) having a first input coupled to a first reference voltage and a second input coupled between the fourth transistor and the first current source, an output of the first op amp configured to provide the first bias signal to the second transistor and to the third transistor.
-
公开(公告)号：US09246477B2
公开(公告)日：2016-01-26
申请号：US14228049
申请日：2014-03-27
Applicant: QUALCOMM Incorporated
Inventor： Miao Li , Xiaohua Kong , Zhi Zhu , Jie Xu
IPC: H03K19/0175 , H03K3/356
CPC classification number: H03K3/35613 , H03F3/45475 , H03F2200/291 , H03F2203/45081 , H03F2203/45084
Abstract: A common mode voltage level shifting circuit including: input nodes configured to receive a differential signal with a first common mode voltage, a pair of shunt capacitors coupled between the input nodes and a corresponding pair of output nodes, a threshold voltage circuit, including the output nodes, coupled to the differential signal though the shunt capacitors, the threshold voltage circuit configured to provide a second common mode voltage for the differential signal at the output nodes, and current sources that are controlled according to a level of the first common mode voltage, the current sources coupled to the output nodes to effect the second common mode voltage.
Abstract translation: 一种共模电压电平移位电路，包括：被配置为接收具有第一共模电压的差分信号的输入节点，耦合在输入节点之间的一对并联电容器和相应的一对输出节点，包括输出端的阈值电压电路 节点，其通过并联电容器耦合到差分信号，阈值电压电路被配置为为输出节点处的差分信号提供第二共模电压，以及根据第一共模电压的电平来控制的电流源， 电流源耦合到输出节点以实现第二共模电压。
-
公开(公告)号：US10817007B2
公开(公告)日：2020-10-27
申请号：US15657535
申请日：2017-07-24
Applicant: QUALCOMM Incorporated
Inventor： Madjid Hafizi , Jie Xu , Xiaohua Kong , Nam V. Dang
Abstract: A pre-driver circuit generates a driver bias signal based on a swing command, a driver impedance characteristic, and an input signal. A driver receives the driver bias signal and generates, in response, a driver signal having a swing and having an output impedance corresponding to the bias signal. Optionally, the driver receives power from a switchable one of multiple supply rails, according to the swing. Optionally, the driver has voltage controlled resistor elements and the driver bias signal is generated based on the swing command and a replica of the driver voltage controlled resistor elements.
-
公开(公告)号：US20170373521A1
公开(公告)日：2017-12-28
申请号：US15192911
申请日：2016-06-24
Applicant: QUALCOMM Incorporated
Inventor： Xiaohua Kong , Jie Xu
CPC classification number: H02J7/0072 , G05F1/575 , H02J3/14 , H04L25/00 , H04L27/00
Abstract: A plurality of drivers for driving corresponding differential data output signals are arranged in series such that a first current discharged by a first one of the drivers is recycled through remaining ones of the drivers.
-
公开(公告)号：US09209788B2
公开(公告)日：2015-12-08
申请号：US14228049
申请日：2014-03-27
Applicant: QUALCOMM Incorporated
Inventor： Miao Li , Xiaohua Kong , Zhi Zhu , Jie Xu
IPC: H03K19/0175 , H03K3/356
Abstract: A common mode voltage level shifting circuit including: input nodes configured to receive a differential signal with a first common mode voltage, a pair of shunt capacitors coupled between the input nodes and a corresponding pair of output nodes, a threshold voltage circuit, including the output nodes, coupled to the differential signal though the shunt capacitors, the threshold voltage circuit configured to provide a second common mode voltage for the differential signal at the output nodes, and current sources that are controlled according to a level of the first common mode voltage, the current sources coupled to the output nodes to effect the second common mode voltage.
-
Patent Agency Ranking
公开(公告)号：US09203391B2
公开(公告)日：2015-12-01
申请号：US14258980
申请日：2014-04-22
Applicant: QUALCOMM Incorporated
Inventor： Zhi Zhu , Xiaohua Kong , Li Sun , Jie Xu
CPC classification number: H03K9/08 , G06F13/4072 , H04L25/4902 , Y02D10/14 , Y02D10/151
Abstract: Systems and methods for decoding pulse-width modulated (PWM) data are disclosed. An example decoder filters a data input signal with a one-sided pulse filter. The one-sided pulse filter suppresses short pulses on the data input signal and passes long pulses. The example decoder latch the filtered data signal at the end of each bit time of the data input signal. The duration of pulses that are suppressed by the one-sided pulse filter can be calibrated to compensate for circuit variations and to allow the decoder to operate at various data rates. The decoder can be implemented in a small integrated circuit area and can be power efficient.
Abstract translation: 公开了用于解码脉宽调制（PWM）数据的系统和方法。 示例解码器用单向脉冲滤波器对数据输入信号进行滤波。 单面脉冲滤波器抑制数据输入信号的短脉冲，并通过长脉冲。 示例解码器在数据输入信号的每个位时间结束时锁存经滤波的数据信号。 由单侧脉冲滤波器抑制的脉冲的持续时间可被校准，以补偿电路变化并允许解码器以各种数据速率工作。 解码器可以在小的集成电路区域中实现，并且可以是功率效率的。
-
公开(公告)号：US20170322582A1
公开(公告)日：2017-11-09
申请号：US15657535
申请日：2017-07-24
Applicant: QUALCOMM Incorporated
Inventor： Madjid Hafizi , Jie Xu , Xiaohua Kong , Nam V. Dang
CPC classification number: G05F3/08 , H03F2200/03 , H04L25/0278 , H04L25/028
Abstract: A pre-driver circuit generates a driver bias signal based on a swing command, a driver impedance characteristic, and an input signal. A driver receives the driver bias signal and generates, in response, a driver signal having a swing and having an output impedance corresponding to the bias signal. Optionally, the driver receives power from a switchable one of multiple supply rails, according to the swing. Optionally, the driver has voltage controlled resistor elements and the driver bias signal is generated based on the swing command and a replica of the driver voltage controlled resistor elements.
-
公开(公告)号：US20150303910A1
公开(公告)日：2015-10-22
申请号：US14258980
申请日：2014-04-22
Applicant: QUALCOMM Incorporated
Inventor： Zhi Zhu , Xiaohua Kong , Li Sun , Jie Xu
IPC: H03K9/08
CPC classification number: H03K9/08 , G06F13/4072 , H04L25/4902 , Y02D10/14 , Y02D10/151
Abstract: Systems and methods for decoding pulse-width modulated (PWM) data are disclosed. An example decoder filters a data input signal with a one-sided pulse filter. The one-sided pulse filter suppresses short pulses on the data input signal and passes long pulses. The example decoder latch the filtered data signal at the end of each bit time of the data input signal. The duration of pulses that are suppressed by the one-sided pulse filter can be calibrated to compensate for circuit variations and to allow the decoder to operate at various data rates. The decoder can be implemented in a small integrated circuit area and can be power efficient.
Abstract translation: 公开了用于解码脉宽调制（PWM）数据的系统和方法。 示例解码器用单向脉冲滤波器对数据输入信号进行滤波。 单面脉冲滤波器抑制数据输入信号的短脉冲，并通过长脉冲。 示例解码器在数据输入信号的每个位时间结束时锁存经滤波的数据信号。 由单侧脉冲滤波器抑制的脉冲的持续时间可被校准，以补偿电路变化并允许解码器以各种数据速率工作。 解码器可以在小的集成电路区域中实现，并且可以是功率效率的。
-
公开(公告)号：US20150280695A1
公开(公告)日：2015-10-01
申请号：US14228049
申请日：2014-03-27
Applicant: QUALCOMM Incorporated
Inventor： Miao Li , Xiaohua Kong , Zhi Zhu , Jie Xu
IPC: H03K3/356
CPC classification number: H03K3/35613 , H03F3/45475 , H03F2200/291 , H03F2203/45081 , H03F2203/45084
Abstract: A common mode voltage level shifting circuit including: input nodes configured to receive a differential signal with a first common mode voltage, a pair of shunt capacitors coupled between the input nodes and a corresponding pair of output nodes, a threshold voltage circuit, including the output nodes, coupled to the differential signal though the shunt capacitors, the threshold voltage circuit configured to provide a second common mode voltage for the differential signal at the output nodes, and current sources that are controlled according to a level of the first common mode voltage, the current sources coupled to the output nodes to effect the second common mode voltage.
Abstract translation: 一种共模电压电平移位电路，包括：被配置为接收具有第一共模电压的差分信号的输入节点，耦合在输入节点之间的一对并联电容器和相应的一对输出节点，包括输出端的阈值电压电路 节点，其通过并联电容器耦合到差分信号，阈值电压电路被配置为为输出节点处的差分信号提供第二共模电压，以及根据第一共模电压的电平来控制的电流源， 电流源耦合到输出节点以实现第二共模电压。
-
10.发明授权公开(公告)号：US11139843B1
公开(公告)日：2021-10-05
申请号：US16927537
申请日：2020-07-13
Applicant: QUALCOMM Incorporated
IPC: H04L27/00 , H04B1/04 , H03K19/0185
Abstract: Certain aspects of the present disclosure generally relate to a driver circuit for a serializer/deserializer (SerDes) transmitter and techniques for operating such a driver circuit. One example driver circuit generally includes a pre-driver circuit, an output stage circuit, and a common-gate buffer circuit coupled between an output of the pre-driver circuit and a first input of the output stage circuit.
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.014 seconds)
