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    Level-shifting amplifier
    6.
    发明授权
    Level-shifting amplifier 有权
    电平转换放大器

    公开(公告)号：US09374050B1

    公开(公告)日：2016-06-21

    申请号：US14610597

    申请日：2015-01-30

    申请人： LINEAR TECHNOLOGY CORPORATION

    发明人： Joseph Adut ,  John Perry Myers

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45502 ,  H03F3/45201 ,  H03F2203/45081 ,  H03F2203/45082

    摘要： A differential amplifier may, when connected to a positive or negative supply voltage and to a ground voltage, provide a differential pair of outputs signals at a differential output that are an amplification of a differential pair of input signals at a differential input. A differential input stage may receive the differential pair of input signals from the differential input and may include a first transistor associated with one of the input signals and a second transistor associated with the other input signal. A differential output stage may generate the differential pair of output signals at the differential output and may include a third transistor associated with one of the output signals and a fourth transistor associated with the other output signal. The first, second, third, and fourth transistors may be all P type or all N type. The differential pair of output signals may have a common mode that is: near the ground voltage when the first, second, third, and fourth transistors are all N type and the supply voltage is positive with respect to the ground voltage; near the supply voltage when the first, second, third, and fourth transistors are all P type and the supply voltage is positive with respect to the ground voltage; near the ground voltage when the first, second, third, and fourth transistors are all P type and the supply voltage is negative with respect to the ground voltage; or near the supply voltage when the first, second, third, and fourth transistors are all N type and the supply voltage is negative with respect to the ground voltage.

    摘要翻译： 当差分放大器连接到正或负电源电压和接地电压时，可以在差分输出端提供差分输出信号差分输出信号，差分输出信号是差分输入端的差分输入信号对的放大。 差分输入级可以接收来自差分输入的差分输入信号对，并且可以包括与输入信号之一相关联的第一晶体管和与另一输入信号相关联的第二晶体管。 差分输出级可以在差分输出处产生差分输出信号对，并且可以包括与输出信号之一相关联的第三晶体管和与另一输出信号相关联的第四晶体管。 第一，第二，第三和第四晶体管可以是全P型或全N型。 输出信号的差分对可以具有共模，即当第一，第二，第三和第四晶体管都为N型时，接地电压附近，并且电源电压相对于接地电压为正; 当第一，第二，第三和第四晶体管都为P型并且电源电压相对于接地电压为正时在电源电压附近; 当第一，第二，第三和第四晶体管都为P型并且电源电压相对于接地电压为负时，接地电压附近; 或者当第一，第二，第三和第四晶体管都为N型并且电源电压相对于接地电压为负时，接近电源电压。