LEAKAGE COMPENSATION CIRCUIT FOR PHASE-LOCKED LOOP (PLL) LARGE THIN OXIDE CAPACITORS
    3.
    发明申请
    LEAKAGE COMPENSATION CIRCUIT FOR PHASE-LOCKED LOOP (PLL) LARGE THIN OXIDE CAPACITORS 审中-公开
    用于相位锁定环路(PLL)的大型氧化物电容器的泄漏补偿电路

    公开(公告)号:US20160373116A1

    公开(公告)日:2016-12-22

    申请号:US15257578

    申请日:2016-09-06

    CPC classification number: H03L7/0802 H02M3/07 H03L7/0891 H03L7/093

    Abstract: Certain aspects of the present disclosure provide methods and apparatus for compensating, or at least adjusting, for capacitor leakage. One example method generally includes determining a leakage voltage corresponding to a leakage current of a capacitor in a filter for a phase-locked loop (PLL), wherein the determining comprises closing a set of switches for discontinuous sampling of the leakage voltage; based on the sampled leakage voltage, generating a sourced current approximately equal to the leakage current; and injecting the sourced current into the capacitor.

    Abstract translation: 本公开的某些方面提供了用于补偿或至少调整电容器泄漏的方法和装置。 一个示例性方法通常包括确定对应于用于锁相环(PLL)的滤波器中的电容器的漏电流的泄漏电压,其中所述确定包括闭合一组开关以不连续地采样泄漏电压; 基于采样的泄漏电压,产生大致等于泄漏电流的源电流; 并将源电流注入电容器。

    FULLY I/Q BALANCED QUADRATURE RADIO FREQUENCY MIXER WITH LOW NOISE AND LOW CONVERSION LOSS
    4.
    发明申请
    FULLY I/Q BALANCED QUADRATURE RADIO FREQUENCY MIXER WITH LOW NOISE AND LOW CONVERSION LOSS 有权
    充分的I / Q平衡无线电频率混合器具有低噪声和低转换损耗

    公开(公告)号:US20160241192A1

    公开(公告)日:2016-08-18

    申请号:US14622591

    申请日:2015-02-13

    Abstract: A method, an apparatus, and a system product for mixing radio frequency signals are provided. In one aspect, the apparatus is configured to perform switching of switches based on first, second, third, and fourth phased half duty clock signals. The apparatus convolves a differential input signal on a differential input port with the first, second, third, and fourth phased half duty cycle clock signals to concurrently generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port. The first, second, third, and fourth phased half duty cycle clock signals are of the same frequency and out of phase by a multiple of ninety degrees with respect to each other.

    Abstract translation: 提供了一种用于混合射频信号的方法,装置和系统产品。 一方面,该装置被配置为基于第一,第二,第三和第四相位半占空时钟信号来执行开关的切换。 该装置利用第一,第二,第三和第四相位半占空比时钟信号在差分输入端口上卷积差分输入信号,以同时产生差分同相输出信号和双差分上的差分正交相输出信号 输出端口 第一,第二,第三和第四相位半占空比时钟信号的频率相同,相位相差90度。

    PHASE DETECTING CIRCUIT FOR INTERCHAIN LOCAL OSCILLATOR (LO) DIVIDER PHASE ALIGNMENT
    5.
    发明申请
    PHASE DETECTING CIRCUIT FOR INTERCHAIN LOCAL OSCILLATOR (LO) DIVIDER PHASE ALIGNMENT 有权
    用于INTERCHAIN本地振荡器(LO)分相器相位对准的相位检测电路

    公开(公告)号:US20160087783A1

    公开(公告)日:2016-03-24

    申请号:US14495183

    申请日:2014-09-24

    CPC classification number: H03M1/34 H03K5/22 H03K2005/00286 H04B1/40

    Abstract: Certain aspects of the present invention provide methods and apparatus for detecting phase shift between signals, such as local oscillating signals in adjacent transceiver paths. One example circuit for phase detection generally includes a mixer configured to mix a first input signal having a first frequency with a second input signal having a second frequency to produce an output signal having frequency components at the sum of and the difference between the first and second frequencies; a filter connected with the mixer and configured to remove one of the frequency components at the sum of the first and second frequencies, thereby leaving a DC component; and an analog-to-digital converter (ADC) (e.g., a comparator) connected with the filter and configured to determine whether the first input signal is in-phase or out-of-phase with the second input signal based on a comparison between the DC component and a reference signal.

    Abstract translation: 本发明的某些方面提供用于检测信号之间的相移的方法和装置,例如相邻收发器路径中的本地振荡信号。 用于相位检测的一个示例电路通常包括混频器,其被配置为将具有第一频率的第一输入信号与具有第二频率的第二输入信号混合,以产生具有频率分量在第一和第二频率之和之间的频率分量的输出信号 频率; 滤波器,与所述混频器连接并且被配置为以所述第一和第二频率的和去除所述频率分量中的一个,从而留下DC分量; 以及与所述滤波器连接并且被配置为基于所述第一输入信号与所述第二输入信号之间的比较来确定所述第一输入信号是与所述第二输入信号是同相还是异相的模拟 - 数字转换器(例如,比较器) DC分量和参考信号。

    LOW NOISE PHASE LOCKED LOOPS
    6.
    发明申请
    LOW NOISE PHASE LOCKED LOOPS 审中-公开
    低噪音相位锁

    公开(公告)号:US20150318860A1

    公开(公告)日:2015-11-05

    申请号:US14266730

    申请日:2014-04-30

    CPC classification number: H03L7/0891 H03L7/1976

    Abstract: Aspects of circuits and methods for generating an oscillating signal are disclosed. The circuit includes a phase detector configured to output first and second signals responsive to a phase difference between two input signals. The phase detector is further configured to disable the first signal when outputting the second signal and to disable the second signal when outputting the first signal. The circuit further includes a voltage controlled oscillator (VCO) configured to generate an oscillating signal having a tunable frequency responsive to the first and second signals.

    Abstract translation: 公开了用于产生振荡信号的电路和方法。 该电路包括相位检测器,被配置为响应于两个输入信号之间的相位差而输出第一和第二信号。 相位检测器还被配置为当输出第二信号时禁止第一信号,并且当输出第一信号时禁止第二信号。 电路还包括压控振荡器(VCO),其被配置为产生响应于第一和第二信号的具有可调谐频率的振荡信号。

    LOW NOISE AND LOW POWER VOLTAGE-CONTROLLED OSCILLATOR (VCO) USING TRANSCONDUCTANCE (gm) DEGENERATION
    7.
    发明申请
    LOW NOISE AND LOW POWER VOLTAGE-CONTROLLED OSCILLATOR (VCO) USING TRANSCONDUCTANCE (gm) DEGENERATION 有权
    低噪声和低功耗电压控制振荡器(VCO)使用TRANSCONDUCTANCE(gm)DEGENERATION

    公开(公告)号:US20150263671A1

    公开(公告)日:2015-09-17

    申请号:US14204542

    申请日:2014-03-11

    Abstract: Certain aspects of the present disclosure generally relate to voltage-controlled oscillators (VCOs) using a lowered or an adjustable negative transconductance (−gm) compared to conventional VCOs. This −gm degeneration technique suppresses the noise injected into an inductor-capacitor (LC) tank of the VCO, thereby providing lower signal-to-noise ratio (SNR) for a given VCO voltage swing, lower power consumption, and decreased phase noise. One example VCO generally includes a resonant tank circuit, an active negative transconductance circuit connected with the resonant tank circuit, and a bias current circuit for sourcing or sinking a bias current through the resonant tank circuit and the active negative transconductance circuit to generate an oscillating signal. The active negative transconductance circuit includes cross-coupled transistors and an impedance connected between the cross-coupled transistors and a reference voltage.

    Abstract translation: 本公开的某些方面通常涉及使用与常规VCO相比降低或可调负负跨导(-gm)的压控振荡器(VCO)。 该-gm退化技术抑制注入到VCO的电感 - 电容(LC)槽中的噪声,从而为给定的VCO电压摆幅提供较低的信噪比(SNR),降低功耗,降低相位噪声。 一个示例VCO通常包括谐振回路电路,与谐振回路连接的有源负跨导电路以及用于通过谐振回路和有源负跨导电路来产生或吸收偏置电流的偏置电流电路,以产生振荡信号 。 有源负跨导电路包括交叉耦合晶体管和连接在交叉耦合晶体管与参考电压之间的阻抗。

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