公开(公告)号：US20180253314A1

公开(公告)日：2018-09-06

申请号：US15448232

申请日：2017-03-02

Applicant: QUALCOMM Incorporated

Inventor： Dhamim PACKER ALI ,  Yanru LI ,  Ashutosh SHRIVASTAVA ,  Azzedine TOUZNI ,  Mamta DESAI

IPC: G06F9/44

Abstract: Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of operating a system-on-chip (SoC). The method includes selecting a CPU core of a plurality of CPU cores of the SoC to boot the SoC based on information indicative of the quality of the plurality of CPU cores stored on the SoC. The method includes running boot code on the selected CPU.

公开(公告)号：US20200026667A1

公开(公告)日：2020-01-23

申请号：US16041645

申请日：2018-07-20

Applicant: QUALCOMM Incorporated

Inventor： Dexter Tamio CHUN ,  Yanru LI

IPC: G06F12/14 ,  G06F21/79 ,  G11C8/10

Abstract: In conventional memory systems, no access control is performed when write-x and datacopy0 are issued. To address this issue, it is proposed to provide access control to these commands by leveraging the mechanism to enforce access control to normal write commands so that the mechanism is also applied to the write-x and datacopy0 commands.

公开(公告)号：US20190043558A1

公开(公告)日：2019-02-07

申请号：US15667618

申请日：2017-08-02

Applicant: QUALCOMM Incorporated

Inventor： Jungwon SUH ,  Yanru LI ,  Haw-Jing LO ,  Dexter Tamio CHUN

IPC: G11C11/406 ,  G11C7/10

CPC classification number: G11C11/40622 ,  G11C7/1006 ,  G11C7/1045 ,  G11C8/12 ,  G11C11/40611 ,  G11C11/40615 ,  G11C11/40618 ,  G11C2211/406

Abstract: In a conventional memory subsystem, a memory controller issues explicit refresh commands to a DRAM memory device to maintain integrity of the data stored in the memory device when the memory device is in an auto-refresh mode. A significant amount of power may be consumed to carry out the refresh. To address this and other issues, it is proposed to allow a partial refresh in the auto-refresh mode in which the refreshing operation may be skipped for a subset of the memory cells. Through such selective refresh skipping, the power consumed for auto-refreshes may be reduced. Operating system kernels and memory drivers may be configured to determine areas of memory for which the refreshing operation can be skipped.

公开(公告)号：US20150261632A1

公开(公告)日：2015-09-17

申请号：US14458009

申请日：2014-08-12

Applicant: QUALCOMM Incorporated

Inventor： Jung Pill KIM ,  Dexter Tamio CHUN ,  Deepti Vijayalakshmi SRIRAMAGIRI ,  Mosaddiq SAIFUDDIN ,  Xiangyu DONG ,  Sungryul KIM ,  Yanru LI ,  Jungwon SUH

IPC: G06F11/20 ,  G11C29/52

CPC classification number: G06F11/2053 ,  G06F11/073 ,  G06F11/0775 ,  G06F11/0793 ,  G06F11/08 ,  G06F11/1048 ,  G06F11/3037 ,  G11C29/4401 ,  G11C29/52 ,  G11C2029/0409

Abstract: Methods and systems for an in-system repair process that repairs or attempts to repair random bit failures in a memory device are provided. In some examples, an in-system repair process may select alternative steps depending on whether the failure is correctable or uncorrectable. In these examples, the process uses communications between a system on chip and the memory to fix the failures during normal operation.

Abstract translation: 提供了修复或尝试修复存​​储器件中的随机位故障的系统内修复过程的方法和系统。 在一些示例中，系统内修复过程可以根据故障是可校正还是不可校正来选择替代步骤。 在这些示例中，该过程使用片上系统与存储器之间的通信来在正常操作期间修复故障。

公开(公告)号：US20220027520A1

公开(公告)日：2022-01-27

申请号：US16937907

申请日：2020-07-24

Applicant: QUALCOMM Incorporated

Inventor： Yanru LI ,  Dexter Tamio CHUN

IPC: G06F21/79 ,  G06F21/31 ,  G06F12/14 ,  G06F11/07

Abstract: Various embodiments may include methods and systems for providing secure in-memory device access of a memory device by a system-on-a-chip (SOC). Various methods may include receiving a configuration message from the SOC for configuring a memory access control of the memory device, and configuring the memory access control based on the configuration message. Various embodiments may include receiving an access request message from the SOC requesting access to a memory base address and a memory access range of a memory cell array of the memory device, wherein the access request message includes a read/write operation. Various embodiments may include comparing the access request message with the configured memory access control to determine whether the access request message is allowable. Various embodiments may further include performing the read/write operation in response to determining that the access request message is allowable.

公开(公告)号：US20200321051A1

公开(公告)日：2020-10-08

申请号：US16907103

申请日：2020-06-19

Applicant: QUALCOMM Incorporated

Inventor： Jungwon SUH ,  Yanru LI ,  Michael Hawjing LO ,  Dexter Tamio CHUN

IPC: G11C11/406 ,  G11C7/10

Abstract: In a conventional memory subsystem, a memory controller issues explicit refresh commands to a DRAM memory device to maintain integrity of the data stored in the memory device when the memory device is in an auto-refresh mode. A significant amount of power may be consumed to carry out the refresh. To address this and other issues, it is proposed to allow a partial refresh in the auto-refresh mode in which the refreshing operation may be skipped for a subset of the memory cells. Through such selective refresh skipping, the power consumed for auto-refreshes may be reduced. Operating system kernels and memory drivers may be configured to determine areas of memory for which the refreshing operation can be skipped.

公开(公告)号：US20220222137A1

公开(公告)日：2022-07-14

申请号：US17147110

申请日：2021-01-12

Applicant: QUALCOMM INCORPORATED

Inventor： Yanru LI ,  Dexter Tamio CHUN

IPC: G06F11/10 ,  G06F16/907

Abstract: Transferring data between memories may include reading data associated with a memory transfer transaction from a first memory, determining whether a bypass indication associated with the memory transfer transaction is asserted, and transferring the data from the first memory to a second memory. The transferring may include bypassing the first-processing if the bypass indication is asserted. The transferring may further include bypassing second-processing the data if the bypass indication is asserted. Following bypassing the second-processing, the data may be stored in the second memory.

公开(公告)号：US20210343331A1

公开(公告)日：2021-11-04

申请号：US17377799

申请日：2021-07-16

Applicant: QUALCOMM Incorporated

Inventor： Jungwon SUH ,  Yanru LI ,  Michael Hawjing LO ,  Dexter Tamio CHUN

IPC: G11C11/406 ,  G11C7/10

Abstract: In a conventional memory subsystem, a memory controller issues explicit refresh commands to a DRAM memory device to maintain integrity of the data stored in the memory device when the memory device is in an auto-refresh mode. A significant amount of power may be consumed to carry out the refresh. To address this and other issues, it is proposed to allow a partial refresh in the auto-refresh mode in which the refreshing operation may be skipped for a subset of the memory cells. Through such selective refresh skipping, the power consumed for auto-refreshes may be reduced. Operating system kernels and memory drivers may be configured to determine areas of memory for which the refreshing operation can be skipped.

公开(公告)号：US20190221252A1

公开(公告)日：2019-07-18

申请号：US16362427

申请日：2019-03-22

Applicant: QUALCOMM Incorporated

Inventor： Jungwon SUH ,  Yanru LI ,  Michael Hawjing LO ,  Dexter Tamio CHUN

IPC: G11C11/406 ,  G11C7/10

Abstract: In a conventional memory subsystem, a memory controller issues explicit refresh commands to a DRAM memory device to maintain integrity of the data stored in the memory device when the memory device is in an auto-refresh mode. A significant amount of power may be consumed to carry out the refresh. To address this and other issues, it is proposed to allow a partial refresh in the auto-refresh mode in which the refreshing operation may be skipped for a subset of the memory cells. Through such selective refresh skipping, the power consumed for auto-refreshes may be reduced. Operating system kernels and memory drivers may be configured to determine areas of memory for which the refreshing operation can be skipped.

公开(公告)号：US20180293204A1

公开(公告)日：2018-10-11

申请号：US15682296

申请日：2017-08-21

Applicant: QUALCOMM Incorporated

Inventor： Dhamim PACKER ALI ,  Sreenivasulu Reddy CHALAMCHARLA ,  Ruchi PAREKH ,  Daison DAVIS KOOLA ,  Dhaval PATEL ,  Eric TASESKI ,  Yanru LI ,  Alexander GANTMAN

IPC: G06F15/177 ,  G06F17/50 ,  G06F21/57 ,  G06F9/44 ,  G05B13/02 ,  G06F15/76

Abstract: Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of calibrating a component. The method includes receiving previous calibration parameters for an external component at a secondary SoC from a primary SoC, wherein the secondary SoC is coupled to the external component and configured to calibrate the external component. The method further includes determining validity of the previous calibration parameters by the secondary SoC. The method further includes operating the external component by the secondary SoC based on the determined validity of the previous calibration parameters.