公开(公告)号：US20170229190A1

公开(公告)日：2017-08-10

申请号：US15393634

申请日：2016-12-29

Applicant: RAMBUS INC.

Inventor： Thomas Vogelsang ,  William Ng ,  Frederick A. Ware

IPC: G11C29/02 ,  G11C5/06 ,  G01R31/28 ,  H01L21/66 ,  H01L25/065 ,  G11C8/10 ,  G11C5/02

CPC classification number: G11C29/025 ,  G01R31/2851 ,  G01R31/2853 ,  G11C5/02 ,  G11C5/06 ,  G11C8/10 ,  G11C29/04 ,  H01L22/34 ,  H01L25/0657 ,  H01L2224/16146 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/10253 ,  H01L2924/1434 ,  H01L2924/00

Abstract: Embodiments generally relate to integrated circuit devices having through silicon vias (TSVs). In one embodiment, an integrated circuit (IC) device includes a field of TSVs and an address decoder that selectably couples at least one of the TSVs to at least one of a test input and a test evaluation circuit. In another embodiment, a method includes selecting one or more TSVs from a field of TSVs in at least one IC device, and coupling each selected TSV to at least one of a test input and a test evaluation circuit.

公开(公告)号：US11004530B2

公开(公告)日：2021-05-11

申请号：US16378304

申请日：2019-04-08

Applicant: RAMBUS INC.

Inventor： Thomas Vogelsang ,  William Ng ,  Frederick A. Ware

IPC: G11C29/02 ,  G11C5/06 ,  G01R31/28 ,  G11C5/02 ,  G11C29/04 ,  H01L25/065 ,  G11C8/10 ,  H01L21/66

Abstract: Embodiments generally relate to integrated circuit devices having through silicon vias (TSVs). In one embodiment, an integrated circuit (IC) device includes a field of TSVs and an address decoder that selectably couples at least one of the TSVs to at least one of a test input and a test evaluation circuit. In another embodiment, a method includes selecting one or more TSVs from a field of TSVs in at least one IC device, and coupling each selected TSV to at least one of a test input and a test evaluation circuit.

公开(公告)号：US10262750B2

公开(公告)日：2019-04-16

申请号：US15393634

申请日：2016-12-29

Applicant: RAMBUS INC.

Inventor： Thomas Vogelsang ,  William Ng ,  Frederick A. Ware

IPC: G01R31/28 ,  G11C29/02 ,  H01L21/66 ,  H01L25/065 ,  G11C8/10 ,  G11C29/04 ,  G11C5/02 ,  G11C5/06

Abstract: Embodiments generally relate to integrated circuit devices having through silicon vias (TSVs). In one embodiment, an integrated circuit (IC) device includes a field of TSVs and an address decoder that selectably couples at least one of the TSVs to at least one of a test input and a test evaluation circuit. In another embodiment, a method includes selecting one or more TSVs from a field of TSVs in at least one IC device, and coupling each selected TSV to at least one of a test input and a test evaluation circuit.

公开(公告)号：US11600349B2

公开(公告)日：2023-03-07

申请号：US17226216

申请日：2021-04-09

Applicant: RAMBUS INC.

Inventor： Thomas Vogelsang ,  William Ng ,  Frederick A. Ware

IPC: G11C29/02 ,  H01L25/065 ,  G01R31/28 ,  G11C8/10 ,  G11C5/02 ,  H01L21/66 ,  G11C29/04 ,  G11C5/06

Abstract: Embodiments generally relate to integrated circuit devices having through silicon vias (TSVs). In one embodiment, an integrated circuit (IC) device includes a field of TSVs and an address decoder that selectably couples at least one of the TSVs to at least one of a test input and a test evaluation circuit. In another embodiment, a method includes selecting one or more TSVs from a field of TSVs in at least one IC device, and coupling each selected TSV to at least one of a test input and a test evaluation circuit.

公开(公告)号：US20190259464A1

公开(公告)日：2019-08-22

申请号：US16378304

申请日：2019-04-08

Applicant: RAMBUS INC.

Inventor： Thomas Vogelsang ,  William Ng ,  Fredrick A. Ware

IPC: G11C29/02 ,  G11C5/06 ,  G01R31/28 ,  G11C5/02 ,  G11C29/04 ,  H01L25/065 ,  G11C8/10 ,  H01L21/66

Abstract: Embodiments generally relate to integrated circuit devices having through silicon vias (TSVs). In one embodiment, an integrated circuit (IC) device includes a field of TSVs and an address decoder that selectably couples at least one of the TSVs to at least one of a test input and a test evaluation circuit. In another embodiment, a method includes selecting one or more TSVs from a field of TSVs in at least one IC device, and coupling each selected TSV to at least one of a test input and a test evaluation circuit.

公开(公告)号：US20210233599A1

公开(公告)日：2021-07-29

申请号：US17226216

申请日：2021-04-09

Applicant: RAMBUS INC.

Inventor： Thomas Vogelsang ,  William Ng ,  Frederick A. Ware

IPC: G11C29/02 ,  H01L25/065 ,  H01L21/66 ,  G01R31/28 ,  G11C8/10 ,  G11C29/04 ,  G11C5/02 ,  G11C5/06

Abstract: Embodiments generally relate to integrated circuit devices having through silicon vias (TSVs). In one embodiment, an integrated circuit (IC) device includes a field of TSVs and an address decoder that selectably couples at least one of the TSVs to at least one of a test input and a test evaluation circuit. In another embodiment, a method includes selecting one or more TSVs from a field of TSVs in at least one IC device, and coupling each selected TSV to at least one of a test input and a test evaluation circuit.