公开(公告)号：US20140061821A1

公开(公告)日：2014-03-06

申请号：US13973077

申请日：2013-08-22

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kenya KAWANO ,  Hiroyuki NAKAMURA ,  Yukihiro SATO

IPC: H01L23/373 ,  H01L29/772

CPC classification number: H01L23/373 ,  H01L23/49513 ,  H01L23/49537 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49568 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L29/772 ,  H01L29/7813 ,  H01L2224/05553 ,  H01L2224/29101 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37013 ,  H01L2224/371 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Provided is an electronic device having a semiconductor device and a mounting board. The semiconductor device has a die pad, a semiconductor chip on the die pad, a coupling member coupling the die pad to the semiconductor chip, and a semiconductor package member covering the upper portion of the semiconductor chip and the side surface of the die pad. In this semiconductor device, the plane area of the coupling member coupling the mounting board to the die pad is smaller than the plane area of the lower surface of the die pad exposed from the semiconductor package material. This makes it possible to reduce separation between the die pad and the semiconductor chip resulting from cracks, due to temperature cycling, of the coupling member present between the die pad and the semiconductor chip.

Abstract translation: 提供一种具有半导体器件和安装板的电子器件。 半导体器件具有管芯焊盘，管芯焊盘上的半导体芯片，将管芯焊盘连接到半导体芯片的耦合部件以及覆盖半导体芯片的上部和管芯焊盘侧表面的半导体封装件。 在该半导体器件中，将安装板耦合到管芯焊盘的耦合部件的平面面积小于从半导体封装材料露出的裸片焊盘的下表面的平面面积。 这使得可以减少由于存在于管芯焊盘和半导体芯片之间的耦合部件的温度循环而导致的芯片焊盘和半导体芯片之间的分离。