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公开(公告)号:US20160365144A1
公开(公告)日:2016-12-15
申请号:US15099660
申请日:2016-04-15
Applicant: Renesas Electronics Corporation
Inventor: Makoto UEKI , Koji MASUZAKI , Masaharu MATSUDAIRA , Takashi HASE , Yoshihiro HAYASHI
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C13/004 , G11C13/0064 , G11C2013/0066 , G11C2013/0073 , G11C2013/0092 , G11C2213/79 , G11C2213/82
Abstract: Included are memory cells each including a resistance change element and a control circuit. The circuit performs an On writing process for applying, to the memory cell, an On writing pulse for the cell to be in a resistance state where a resistance value of the resistance change element is lower than a first reference value and an Off writing process for applying an Off writing pulse with an opposite polarity to the On writing pulse for a high resistance state with a second reference value or greater. The circuit applies, in the On writing process, a trial pulse having the same polarity as that of the On writing pulse and having the pulse width shorter than that of the On writing pulse and a reset pulse having the same polarity as that of the On writing pulse, in this order before applying the On writing pulse to the cell.
Abstract translation: 包括各自包括电阻变化元件和控制电路的存储单元。 该电路执行On写入处理,以将存储单元中的On写入脉冲施加在电阻变化元件的电阻值低于第一基准值的电阻状态,以及用于 对具有第二参考值或更高的高电阻状态的ON写入脉冲施加具有相反极性的OFF写入脉冲。 该电路在On写入处理中应用与On写入脉冲具有相同极性的试用脉冲,其脉冲宽度短于On写入脉冲的脉冲宽度,并且具有与On 写入脉冲,按此顺序将“写入”脉冲应用于单元格。
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公开(公告)号:US20160149304A1
公开(公告)日:2016-05-26
申请号:US14946509
申请日:2015-11-19
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Kenichiro HIJIOKA , Masaaki SODA , Masaharu MATSUDAIRA
CPC classification number: H01Q7/00 , B41J19/00 , H01Q1/38 , H04B5/0075
Abstract: An object of the invention is to transmit a waveform suitable for the reception of signals, while suppressing an increase in man-hours needed for design. A transmission-reception device (2) includes: an antenna element (21) which is terminated at a virtual ground point side of the antenna element by a terminating element (213); a conductor plane (23) which has a predetermined potential and surrounds the antenna element (21); and a transmission circuit (25) that outputs a differential signal to both ends of the antenna element (21). An interval between the conductor plane (23) and a first outer edge (214) of the antenna element (21) is shorter than an interval between the conductor plane (23) and a second outer edge (215) of the antenna element (21).
Abstract translation: 本发明的目的是在抑制设计所需的工时增加的同时发送适合于接收信号的波形。 发送接收装置(2)包括:天线元件(21),其通过终端元件(213)终止于所述天线元件的虚拟接地点侧; 具有预定电位并围绕天线元件的导体平面(23); 以及向天线元件(21)的两端输出差分信号的发送电路(25)。 天线元件(21)的导体平面(23)和第一外边缘(214)之间的间隔比天线元件(21)的导体平面(23)和第二外边缘(215)之间的间隔短 )。
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公开(公告)号:US20190187737A1
公开(公告)日:2019-06-20
申请号:US16173576
申请日:2018-10-29
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Masaharu MATSUDAIRA , Takashi HASE , Akira TANABE , Kazuya UEJIMA
CPC classification number: G05F3/205 , G01K7/01 , G05F3/245 , H03K17/145 , H03K2217/0018
Abstract: There is a need to ensure operations at a predetermined operating frequency when a temperature changes in an operating state. A semiconductor device includes: a bias-applied portion applied with a substrate bias; a temperature sensor to detect a temperature; and a substrate bias generator to apply the bias-applied portion with a substrate bias corresponding to the temperature detected by the temperature sensor. The bias-applied portion, while applied with a substrate bias by the substrate bias generator, shifts between an operating state and a stopped state. The substrate bias generator applies the bias-applied portion with a substrate bias configured so as not to cause an upper limit of an operating frequency for the bias-applied portion to be smaller than a predetermined value under condition of the temperature detected by the temperature sensor.
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