公开(公告)号：US20200321861A1

公开(公告)日：2020-10-08

申请号：US16827198

申请日：2020-03-23

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuya HASHIMOTO ,  Kazuya UEJIMA

IPC: H02M3/155 ,  H02M3/07 ,  H01L27/06

Abstract: An electronic system device includes a semiconductor device and a power generating device for generating a power supply voltage. The semiconductor device includes a control circuit coupled with the power generating device via a power supply node, and a substrate-biased control circuit coupled with the control circuit. The electronic system device includes a DC-DC converter, and a switch arranged between the power supply nodes and the DC-DC converter. The control circuit sets the switch to an ON state after receiving the power supply voltage. The DC-DC converter receives the power supply voltage after the switch is controlled to the ON state. The substrate bias control circuit supplies a substrate bias voltage to the control circuit before the DC-DC converter receives the power supply voltage.

公开(公告)号：US20190187737A1

公开(公告)日：2019-06-20

申请号：US16173576

申请日：2018-10-29

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Masaharu MATSUDAIRA ,  Takashi HASE ,  Akira TANABE ,  Kazuya UEJIMA

IPC: G05F3/20 ,  G05F3/24 ,  G01K7/01

CPC classification number: G05F3/205 ,  G01K7/01 ,  G05F3/245 ,  H03K17/145 ,  H03K2217/0018

Abstract: There is a need to ensure operations at a predetermined operating frequency when a temperature changes in an operating state. A semiconductor device includes: a bias-applied portion applied with a substrate bias; a temperature sensor to detect a temperature; and a substrate bias generator to apply the bias-applied portion with a substrate bias corresponding to the temperature detected by the temperature sensor. The bias-applied portion, while applied with a substrate bias by the substrate bias generator, shifts between an operating state and a stopped state. The substrate bias generator applies the bias-applied portion with a substrate bias configured so as not to cause an upper limit of an operating frequency for the bias-applied portion to be smaller than a predetermined value under condition of the temperature detected by the temperature sensor.

公开(公告)号：US20240363750A1

公开(公告)日：2024-10-31

申请号：US18771200

申请日：2024-07-12

Applicant: Renesas Electronics Corporation

Inventor： Kazuya UEJIMA ,  Shiro KAMOHARA ,  Michio ONDA ,  Takashi HASE ,  Tatsuo NISHINO

IPC: H01L29/78 ,  H01L27/12 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/45 ,  H01L29/51 ,  H03F3/45

CPC classification number: H01L29/7838 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1083 ,  H01L29/42376 ,  H01L29/45 ,  H01L29/517 ,  H03F3/45179

Abstract: In a semiconductor device according to an embodiment, a thickness of a semiconductor layer of an SOI substrate on which a field effect transistor constituting an analog circuit is formed is set to 2 nm or more and 24 nm or less.

公开(公告)号：US20220406936A1

公开(公告)日：2022-12-22

申请号：US17897844

申请日：2022-08-29

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuya UEJIMA ,  Michio ONDA ,  Takashi HASE ,  Tatsuo NISHINO ,  Shiro KAMOHARA

IPC: H01L29/78 ,  H01L27/12 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/45 ,  H01L29/51 ,  H03F3/45

Abstract: In a semiconductor device according to an embodiment, a thickness of a semiconductor layer of an SOI substrate on which a field effect transistor constituting an analog circuit is formed is set to 2 nm or more and 24 nm or less.

公开(公告)号：US20190319047A1

公开(公告)日：2019-10-17

申请号：US16361878

申请日：2019-03-22

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuya UEJIMA ,  Kazuhiro KOUDATE

IPC: H01L27/12 ,  H03K3/356 ,  H03K19/0185 ,  H03K3/012 ,  H03K19/00

Abstract: Reduction in power consumption of a semiconductor device is achieved. The semiconductor device includes: a first circuit operating at a first power supply voltage and a second circuit operating at a second power supply voltage and including a level shift unit and a switch unit, the first circuit is configured of a low-breakdown-voltage n-type transistor that is an SOTB transistor, and the switch unit is configured of an n-type transistor that is an SOTB transistor. A second power supply voltage is higher than a first power supply voltage, and an impurity concentration of a channel formation region of the n-type transistor is higher than an impurity concentration of a channel formation region of the low-breakdown-voltage n-type transistor.

公开(公告)号：US20210116951A1

公开(公告)日：2021-04-22

申请号：US17068476

申请日：2020-10-12

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akira TANABE ,  Kazuya UEJIMA

IPC: G05F1/44 ,  H01L27/092 ,  G01R31/40

Abstract: An electronic system device comprises a power generation device generating a power supply voltage, a substrate bias generation circuit connected to the power generation device, a memory circuit, a monitor circuit, and a capacitor connected to the substrate bias generation circuit via a switch. The substrate bias generation circuit generates a substrate bias voltage from the power supply voltage and supplies charges based on the substrate bias voltage to the capacitor while the switch is ON-state. While the switch is OFF-state, the capacitor stores the accumulated charges based on the substrate bias voltage. While the switch is ON-state, the substrate bias generation circuit adds based on the substrate bias voltage to charge that was held, and states the back bias voltage. The substrate bias generation circuit supplies the back bias voltage to memory circuit.

公开(公告)号：US20210111194A1

公开(公告)日：2021-04-15

申请号：US17131455

申请日：2020-12-22

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuya UEJIMA ,  Kazuhiro KOUDATE

IPC: H01L27/12 ,  H03K3/012 ,  H03K19/0185 ,  H03K19/00 ,  H03K3/356

Abstract: Reduction in power consumption of a semiconductor device is achieved. The semiconductor device includes: a first circuit operating at a first power supply voltage and a second circuit operating at a second power supply voltage and including a level shift unit and a switch unit, the first circuit is configured of a low-breakdown-voltage n-type transistor that is an SOTB transistor, and the switch unit is configured of an n-type transistor that is an SOTB transistor. A second power supply voltage is higher than a first power supply voltage, and an impurity concentration of a channel formation region of the n-type transistor is higher than an impurity concentration of a channel formation region of the low-breakdown-voltage n-type transistor.

公开(公告)号：US20200313000A1

公开(公告)日：2020-10-01

申请号：US16753949

申请日：2017-11-14

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuya UEJIMA ,  Shiro KAMOHARA ,  Michio ONDA ,  Takashi HASE ,  Tatsuo NISHINO

IPC: H01L29/78 ,  H01L27/12 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/45 ,  H01L29/51 ,  H03F3/45

Abstract: In a semiconductor device according to an embodiment, a thickness of a semiconductor layer of an SOI substrate on which a field effect transistor constituting an analog circuit is formed is set to 2 nm or more and 24 nm or less.

公开(公告)号：US20200309282A1

公开(公告)日：2020-10-01

申请号：US16820130

申请日：2020-03-16

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shiro KAMOHARA ,  Kazuya UEJIMA

IPC: F16K31/06 ,  H01F7/08 ,  H01F7/06 ,  H01F27/28 ,  H01F7/02 ,  H01F27/24

Abstract: The semiconductor device controls the first circuit for supplying/stopping the current supplied by a DC power supply to the latching solenoid consisting of a coil and a movable iron core and a permanent magnet, the current is measured based on the input from the current detection circuit. The semiconductor device includes a control circuit having a low power dissipation mode in which the leakage current is reduced, and a normal operation mode. The control circuit maintains the low power consumption mode when no current is flowing through the coil, when a current is flowing through the coil maintains the normal operation mode, further, the movable iron core It comprises a control circuit configured to detect the inflection point of the current detected by the current detection circuit when leaving the permanent magnet.

公开(公告)号：US20220264450A1

公开(公告)日：2022-08-18

申请号：US17177985

申请日：2021-02-17

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shiro KAMOHARA ,  Akira TANABE ,  Kazuya UEJIMA ,  Jun UEHARA ,  Kazuya OKUYAMA

IPC: H04W52/02 ,  G16Y20/10 ,  G16Y30/00 ,  G16Y40/35 ,  H04W84/18

Abstract: A microcomputer performs a power supply operation to a wireless communication module at a first time interval set based on a power generation amount at a lowest day power generation amount of a temperature differential power generation module. In addition, the microcomputer performs the power supply operation to a sensor at a second time interval set based on the power generation amount at the lowest day power generation amount of the temperature differential power generation module.