公开(公告)号：US20190204889A1

公开(公告)日：2019-07-04

申请号：US16189089

申请日：2018-11-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shunichi KAERIYAMA ,  Norio KIDO

IPC: G06F1/28 ,  H02P29/68 ,  H02M1/32 ,  G01K1/08

CPC classification number: G06F1/28 ,  G01K1/08 ,  H02M1/32 ,  H02M2001/327 ,  H02P29/68

Abstract: There is to provide a power conversion device capable of estimating a junction temperature of a power transistor at a high accuracy. The control device includes a temperature estimation unit and controls the on and off of the power transistor through a driver. The voltage detection circuit detects the inter-terminal voltage of a source and drain terminals during the on-period of the power transistor. The temperature estimation unit previously holds the correlation information between the inter-terminal voltage and inter-terminal current of the source and drain terminals and the junction temperature, and estimates the junction temperature, based on the inter-terminal voltage detected by the voltage detection circuit, the known inter-terminal current, and the correlation information.

公开(公告)号：US20170229428A1

公开(公告)日：2017-08-10

申请号：US15501750

申请日：2014-08-25

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akira MUTO ,  Norio KIDO

IPC: H01L25/07 ,  H01L23/00 ,  H02P27/06 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L25/072 ,  H01L23/28 ,  H01L23/3114 ,  H01L23/498 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L25/07 ,  H01L25/18 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2224/8485 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/181 ,  H02P25/092 ,  H02P27/06 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

Abstract: For example, a semiconductor device capable of achieving a high performance applicable to an SR motor is provided. The semiconductor device includes a chip mounting portion TAB1 on which a semiconductor chip CHP1 having an IGBT is mounted, and a chip mounting portion TAB2 on which a semiconductor chip CHP2 having a diode is formed. The semiconductor device also includes a lead LD1A electrically connected to an emitter electrode pad EP of the semiconductor chip CHP1 via a clip CLP1, and a lead LD1B electrically connected to an anode electrode pad ADP of the semiconductor chip CHP2 via a clip CLP2. At this time, the chip mounting portion TAB1 is separated electrically from the chip mounting portion TAB2, and the clip CLP1 is separated electrically from the clip CLP2.