Abstract:
A control device is provided which can perform a retraction operation of a head included in a disk storage device with lower power consumption.The control device of the disk storage device includes a control unit that controls a motor and retracts the head from over a disk to a ramp mechanism when power supply is shut down, an acquisition unit that acquires information related to a moving distance of the head that retracts to the ramp mechanism, and a calculation unit that calculates the moving distance of the head based on the information acquired by the acquisition unit. The control unit switches an operation of the motor from a first retract operation to a second retract operation when determining that the head reaches a first position after passing through an inclined surface of the ramp mechanism based on the moving distance calculated by the calculation unit.
Abstract:
A gate drive semiconductor device includes: external terminals to which PWM control signals are supplied; external terminals outputting a drive signal for driving a three-phase BLDC motor; external terminals to which the counter electromotive voltage generated by driving the three-phase BLDC motor is supplied; a zero-cross determination unit generating an interrupt signal indicating timing at which the counter electromotive voltage intersects with a midpoint potential of the three-phase BLDC motor based on the PWM control signal and the counter electromotive voltage; and an external terminal outputting the interrupt signal.
Abstract:
The present invention is intended to reduce noise and vibration of a motor. A first duty correction circuit generates a first corrected duty instruction value which changes with an increment same as an increment of a duty instruction value and in which an offset value as a constant is reflected. A second duty correction circuit generates a second corrected duty instruction value which changes with an increment different from an increment of the duty instruction value. A selector outputs, as the corrected duty instruction value, either one of the first corrected duty instruction value and the second corrected duty instruction value in accordance with a magnitude relation between the duty instruction value and a duty reference value.
Abstract:
A PWM modulation circuit controls low-side transistors of three phases to all be in an ON state when a brake current flows; controls, in a period in which a brake current flows in a first direction in one phase, a transistor for sensing in that one phase to be in an ON state; and controls, in a period in which a brake current flows in the first direction in two phases, transistors for three phases to be in an OFF state. When the brake current is to flow, sense-phase control circuits for the three phases control a transistor for sensing, in a phase in which the brake current flows in a sink direction, to be into an ON state, and controls the transistor for sensing in a phase in which the brake current flows in an opposite direction, to be into an OFF state.