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    Semiconductor devices having through-contacts and related fabrication methods
    1.
    发明授权
    Semiconductor devices having through-contacts and related fabrication methods 有权
    具有通孔和相关制造方法的半导体器件

    公开(公告)号：US08951907B2

    公开(公告)日：2015-02-10

    申请号：US12968068

    申请日：2010-12-14

    申请人： Ralf Richter ,  Jens Heinrich ,  Holger Schuehrer

    发明人： Ralf Richter ,  Jens Heinrich ,  Holger Schuehrer

    IPC分类号： H01L21/4763 ,  H01L21/768 ,  H01L21/285 ,  H01L23/485

    CPC分类号： H01L21/76808 ,  H01L21/28512 ,  H01L21/76802 ,  H01L21/76897 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Apparatus for semiconductor device structures and related fabrication methods are provided. One method for fabricating a semiconductor device structure involves forming a layer of dielectric material overlying a doped region formed in a semiconductor substrate adjacent to a gate structure and forming a conductive contact in the layer of dielectric material. The conductive contact overlies and electrically connects to the doped region. The method continues by forming a second layer of dielectric material overlying the conductive contact, forming a voided region in the second layer overlying the conductive contact, forming a third layer of dielectric material overlying the voided region, and forming another voided region in the third layer overlying at least a portion of the voided region in the second layer. The method continues by forming a conductive material that fills both voided regions to contact the conductive contact.

    摘要翻译： 提供了半导体器件结构和相关制造方法的装置。 一种用于制造半导体器件结构的方法包括形成覆盖在与栅极结构相邻的半导体衬底中形成的掺杂区域的介电材料层，并在该介电材料层中形成导电接触。 导电接触覆盖并电连接到掺杂区域。 该方法继续通过形成覆盖导电接触的第二层介电材料，在覆盖导电接触的第二层中形成空隙区域，形成覆盖空隙区域的第三层电介质材料，以及在第三层中形成另一个空隙区域 覆盖第二层中的空隙区域的至少一部分。 该方法通过形成填充两个空隙区域以接触导电触点的导电材料而继续。

    CAP REMOVAL IN A HIGH-K METAL GATE ELECTRODE STRUCTURE BY USING A SACRIFICIAL FILL MATERIAL
    2.
    发明申请
    CAP REMOVAL IN A HIGH-K METAL GATE ELECTRODE STRUCTURE BY USING A SACRIFICIAL FILL MATERIAL 有权
    通过使用真空填充材料在高K金属电极结构中去除CAP

    公开(公告)号：US20110129980A1

    公开(公告)日：2011-06-02

    申请号：US12905655

    申请日：2010-10-15

    申请人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

    发明人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

    IPC分类号： H01L21/336

    CPC分类号： H01L21/823828 ,  H01L21/823807 ,  H01L29/7843

    摘要： Dielectric cap layers of sophisticated high-k metal gate electrode structures may be efficiently removed on the basis of a sacrificial fill material, thereby reliably preserving integrity of a protective sidewall spacer structure, which in turn may result in superior uniformity of the threshold voltage of the transistors. The sacrificial fill material may be provided in the form of an organic material that may be reduced in thickness on the basis of a wet developing process, thereby enabling a high degree of process controllability.

    摘要翻译： 可以基于牺牲填充材料有效地去除复杂的高k金属栅极电极结构的介电盖层，从而可靠地保持保护性侧壁间隔结构的完整性，这又可以导致优异的阈值电压均匀性 晶体管。 牺牲填充材料可以以有机材料的形式提供，其可以基于湿式显影工艺而减小厚度，从而能够实现高度的工艺可控性。

    Method of Forming Metal Gates and Metal Contacts in a Common Fill Process
    5.
    发明申请
    Method of Forming Metal Gates and Metal Contacts in a Common Fill Process 有权
    在普通填充工艺中形成金属门和金属触点的方法

    公开(公告)号：US20120282765A1

    公开(公告)日：2012-11-08

    申请号：US13100798

    申请日：2011-05-04

    申请人： Ronny Pfützner ,  Ralf Richter ,  Jens Heinrich

    发明人： Ronny Pfützner ,  Ralf Richter ,  Jens Heinrich

    IPC分类号： H01L21/3213

    CPC分类号： H01L21/823871 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/823828

    摘要： The method described herein involves a method of forming metal gates and metal contacts in a common fill process. The method may involve forming a gate structure comprising a sacrificial gate electrode material, forming at least one conductive contact opening in a layer of insulating material positioned adjacent the gate structure, removing the sacrificial gate electrode material to thereby define a gate electrode opening, and performing a common deposition process to fill the conductive contact opening and the gate electrode opening with a conductive fill material.

    摘要翻译： 本文描述的方法涉及在公共填充过程中形成金属栅极和金属触点的方法。 该方法可以包括形成包括牺牲栅电极材料的栅极结构，在邻近栅结构定位的绝缘材料层中形成至少一个导电接触开口，去除牺牲栅电极材料，从而限定栅电极开口，并执行 用于用导电填充材料填充导电接触开口和栅电极开口的公共沉积工艺。

    Methods for fabricating semiconductor devices having local contacts
    7.
    发明授权
    Methods for fabricating semiconductor devices having local contacts 有权
    制造具有局部接触的半导体器件的方法

    公开(公告)号：US08216928B1

    公开(公告)日：2012-07-10

    申请号：US13014561

    申请日：2011-01-26

    申请人： Ralf Richter ,  Torsten Huisinga ,  Jens Heinrich

    发明人： Ralf Richter ,  Torsten Huisinga ,  Jens Heinrich

    IPC分类号： H01L21/44

    CPC分类号： H01L21/823807 ,  H01L21/76801 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823475 ,  H01L21/823814 ,  H01L21/823871 ,  H01L23/53295 ,  H01L29/78 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Fabrication methods for semiconductor device structures are provided. One method for fabricating a semiconductor device structure that includes a gate structure overlying a semiconductor substrate and a doped region formed in the semiconductor substrate adjacent to the gate structure involves the steps of forming a first layer of dielectric material overlying the gate structure and the doped region, isotropically etching the first layer of dielectric material, forming a second layer of dielectric material overlying the first layer of dielectric material after isotropically etching the first layer, and forming a conductive contact that is electrically connected to the doped region within the first layer and the second layer.

    摘要翻译： 提供半导体器件结构的制造方法。 制造半导体器件结构的一种方法包括覆盖半导体衬底的栅极结构和形成在与栅极结构相邻的半导体衬底中的掺杂区域的半导体器件结构包括以下步骤：形成覆盖栅极结构和掺杂区域的第一绝缘材料层 各向同性蚀刻所述第一介电材料层，在各向同性蚀刻所述第一层之后形成覆盖所述第一介电材料层的第二介电材料层，以及形成电连接到所述第一层内的所述掺杂区域的导电接触，以及 第二层。

    Semiconductor device comprising metal gate structures formed by a replacement gate approach and efuses including a silicide
    9.
    发明授权
    Semiconductor device comprising metal gate structures formed by a replacement gate approach and efuses including a silicide 有权
    半导体器件包括通过替换栅极方法形成的金属栅极结构和包括硅化物的熔点

    公开(公告)号：US08497554B2

    公开(公告)日：2013-07-30

    申请号：US12942506

    申请日：2010-11-09

    申请人： Andy Wei ,  Jens Heinrich ,  Ralf Richter

    发明人： Andy Wei ,  Jens Heinrich ,  Ralf Richter

    IPC分类号： H01L23/62

    CPC分类号： H01L23/5256 ,  H01L27/0617 ,  H01L27/0629 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： In a replacement gate approach for forming high-k metal gate electrode structures, electronic fuses may be provided on the basis of a semiconductor material in combination with a metal silicide by using a recessed surface topography and/or a superior selectivity of the metal silicide material during the replacement gate process. For example, in some illustrative embodiments, electronic fuses may be provided in a recessed portion of an isolation region, thereby avoiding the removal of the semiconductor material when replacing the semiconductor material of the gate electrode structures with a metal-containing electrode material. Consequently, the concept of well-established semiconductor-based electronic fuses may be applied together with sophisticated replacement gate structures of transistors.

    摘要翻译： 在用于形成高k金属栅电极结构的替代栅极方法中，可以通过使用凹陷表面形貌和/或金属硅化物材料的优异选择性，基于半导体材料与金属硅化物的组合来提供电子熔丝 在替换门过程中。 例如，在一些说明性实施例中，电子熔丝可以设置在隔离区域的凹陷部分中，从而避免了当用含金属的电极材料替换栅电极结构的半导体材料时去除半导体材料。 因此，已经确立的基于半导体的电子熔丝的概念可以与晶体管的复杂的替代栅极结构一起应用。