公开(公告)号：US07498256B2

公开(公告)日：2009-03-03

申请号：US11465865

申请日：2006-08-21

申请人： Randolph F. Knarr ,  Christopher D. Sheraw ,  Andrew H. Simon ,  Anna Topol ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Randolph F. Knarr ,  Christopher D. Sheraw ,  Andrew H. Simon ,  Anna Topol ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L21/00

CPC分类号： H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： Contact via structures using a hybrid barrier layer, are disclosed. One contact via structure includes: an opening through a dielectric to a silicide region; a first layer in the opening in direct contact with the silicide region, wherein the first layer is selected from the group consisting of: titanium (Ti) and tungsten nitride (WN); at least one second layer over the first layer, the at least one second layer selected from the group consisting of: tantalum nitride (TaN), titanium nitride (TiN), tantalum (Ta), ruthenium (Ru), rhodium (Rh), platinum (Pt) and cobalt (Co); a seed layer for copper (Cu); and copper (Cu) filling a remaining portion of the opening.

摘要翻译： 公开了通过使用混合阻挡层的结构的接触。 一个接触通孔结构包括：通过电介质到硅化物区的开口; 与所述硅化物区直接接触的所述开口中的第一层，其中所述第一层选自：钛（Ti）和氮化钨（WN）; 在第一层上的至少一个第二层，选自氮化钽（TaN），氮化钛（TiN），钽（Ta），钌（Ru），铑（Rh），铑 铂（Pt）和钴（Co）; 铜（Cu）种子层; 和填充开口的剩余部分的铜（Cu）。

公开(公告)号：US20080042291A1

公开(公告)日：2008-02-21

申请号：US11465865

申请日：2006-08-21

申请人： Randolph F. Knarr ,  Christopher D. Sheraw ,  Andrew H. Simon ,  Anna Topol ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Randolph F. Knarr ,  Christopher D. Sheraw ,  Andrew H. Simon ,  Anna Topol ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L23/48

CPC分类号： H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： Contact via structures using a hybrid barrier layer, are disclosed. One contact via structure includes: an opening through a dielectric to a silicide region; a first layer in the opening in direct contact with the silicide region, wherein the first layer is selected from the group consisting of: titanium (Ti) and tungsten nitride (WN); at least one second layer over the first layer, the at least one second layer selected from the group consisting of: tantalum nitride (TaN), titanium nitride (TiN), tantalum (Ta), ruthenium (Ru), rhodium (Rh), platinum (Pt) and cobalt (Co); a seed layer for copper (Cu); and copper (Cu) filling a remaining portion of the opening.

摘要翻译： 公开了通过使用混合阻挡层的结构的接触。 一个接触通孔结构包括：通过电介质到硅化物区的开口; 与所述硅化物区直接接触的所述开口中的第一层，其中所述第一层选自：钛（Ti）和氮化钨（WN）; 在第一层上的至少一个第二层，选自氮化钽（TaN），氮化钛（TiN），钽（Ta），钌（Ru），铑（Rh），铑 铂（Pt）和钴（Co）; 铜（Cu）种子层; 和填充开口的剩余部分的铜（Cu）。

公开(公告)号：US08592266B2

公开(公告)日：2013-11-26

申请号：US12912963

申请日：2010-10-27

申请人： Zhengwen Li ,  Dechao Guo ,  Randolph F. Knarr ,  Chengwen Pei ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jian Yu ,  Jun Yuan

发明人： Zhengwen Li ,  Dechao Guo ,  Randolph F. Knarr ,  Chengwen Pei ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jian Yu ,  Jun Yuan

IPC分类号： H01L21/336 ,  H01L21/8234

CPC分类号： H01L29/42368 ,  H01L29/42376 ,  H01L29/49 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66606 ,  H01L29/78 ,  H01L29/7833

摘要： In a replacement gate scheme, a continuous material layer is deposited on a bottom surface and a sidewall surface in a gate cavity. A vertical portion of the continuous material layer is removed to form a gate component of which a vertical portion does not extend to a top of the gate cavity. The gate component can be employed as a gate dielectric or a work function metal portion to form a gate structure that enhances performance of a replacement gate field effect transistor.

公开(公告)号：US20120104469A1

公开(公告)日：2012-05-03

申请号：US12912963

申请日：2010-10-27

申请人： Zhengwen Li ,  Dechao Guo ,  Randolph F. Knarr ,  Chengwen Pei ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jian Yu ,  Jun Yuan

发明人： Zhengwen Li ,  Dechao Guo ,  Randolph F. Knarr ,  Chengwen Pei ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jian Yu ,  Jun Yuan

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/42368 ,  H01L29/42376 ,  H01L29/49 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66606 ,  H01L29/78 ,  H01L29/7833

摘要： In a replacement gate scheme, a continuous material layer is deposited on a bottom surface and a sidewall surface in a gate cavity. A vertical portion of the continuous material layer is removed to form a gate component of which a vertical portion does not extend to a top of the gate cavity. The gate component can be employed as a gate dielectric or a work function metal portion to form a gate structure that enhances performance of a replacement gate field effect transistor.

摘要翻译： 在替代栅极方案中，连续材料层沉积在栅极腔中的底表面和侧壁表面上。 去除连续材料层的垂直部分以形成垂直部分不延伸到栅极腔的顶部的栅极部件。 栅组件可以用作栅极电介质或功函数金属部分，以形成增强替代栅极场效应晶体管的性能的栅极结构。

公开(公告)号：US08466443B2

公开(公告)日：2013-06-18

申请号：US12827197

申请日：2010-06-30

申请人： Terence L. Kane ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Terence L. Kane ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L29/02

CPC分类号： H01L45/1616 ,  G11C17/14 ,  H01C7/1013 ,  H01C7/105 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a voltage sensitive resistor (VSR) write once (WO) read only memory (ROM) device which includes a semiconductor device and a VSR connected to the semiconductor device. The VSR WO ROM device is a write once read only device. The VSR includes a CVD titanium nitride layer having residual titanium-carbon bonding such that the VSR is resistive as formed and can become less resistive by an order of 102, more preferably 103 and most preferably 104 when a predetermined voltage and current are applied to the VSR. A plurality of the VSR WO ROM devices may be arranged to form a high density programmable logic circuit in a 3-D stack. Also disclosed are methods to form the VSR WO ROM device.

摘要翻译： 公开了一种包括半导体器件和连接到半导体器件的VSR的一次（WO）只读存储器（ROM）器件的电压敏感电阻器（VSR）。 VSR WO ROM设备是一次写入只读设备。 VSR包括具有残留钛 - 碳键合的CVD氮化钛层，使得VSR是形成的电阻的，并且当预定的电压和电流被施加到电阻时，可以变得更小的电阻性为102，更优选为103，最优选为104。 VSR。 多个VSR WO ROM器件可以被布置成在3-D堆栈中形成高密度可编程逻辑电路。 还公开了形成VSR WO ROM器件的方法。

公开(公告)号：US20120129340A1

公开(公告)日：2012-05-24

申请号：US13360248

申请日：2012-01-27

申请人： Terence L. Kane ,  Michael P. Tenney ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Terence L. Kane ,  Michael P. Tenney ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L21/283

CPC分类号： H01L23/5252 ,  H01L21/76823 ,  H01L21/76843 ,  H01L2924/0002 ,  H01L2924/00

摘要： An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an upper surface of the metal layer, and a contact formed of contact material within a contact via etched through the dielectric layer into the metal layer. The contact via includes a metal material at a bottom surface of the contact via and an untreated or partially treated metal precursor on top of the metal material.

公开(公告)号：US20120126367A1

公开(公告)日：2012-05-24

申请号：US13360277

申请日：2012-01-27

申请人： Terence L. Kane ,  Michael P. Tenney ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Terence L. Kane ,  Michael P. Tenney ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L23/525

CPC分类号： H01L23/5252 ,  H01L21/76823 ,  H01L21/76843 ,  H01L2924/0002 ,  H01L2924/00

摘要： An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an upper surface of the metal layer, and a contact formed of contact material within a contact via etched through the dielectric layer into the metal layer. The contact via includes a metal material at a bottom surface of the contact via and an untreated or partially treated metal precursor on top of the metal material.

公开(公告)号：US20110079874A1

公开(公告)日：2011-04-07

申请号：US12574926

申请日：2009-10-07

申请人： Terence L. Kane ,  Michael P. Tenney ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Terence L. Kane ,  Michael P. Tenney ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L23/525 ,  H01L21/768

CPC分类号： H01L23/5252 ,  H01L21/76823 ,  H01L21/76843 ,  H01L2924/0002 ,  H01L2924/00

摘要： An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an upper surface of the metal layer, and a contact formed of contact material within a contact via etched through the dielectric layer into the metal layer. The contact via includes a metal material at a bottom surface of the contact via and an untreated or partially treated metal precursor on top of the metal material.

摘要翻译： 反熔丝结构和在反熔丝结构内形成接触的方法。 反熔丝结构包括具有上覆金属层的基板，形成在金属层的上表面上的电介质层，以及由通过电介质层蚀刻到金属层中的接触孔内的接触材料形成的接触。 接触通孔在接触通孔的底表面处包括金属材料，并且在金属材料的顶部上包​​括未处理或部分处理的金属前体。

公开(公告)号：US07179760B2

公开(公告)日：2007-02-20

申请号：US10908833

申请日：2005-05-27

申请人： Richard A. Conti ,  Thomas F. Houghton ,  Michael F. Lofaro ,  Jeffery B. Maxson ,  Ann H. McDonald ,  Yun-Yu Wang ,  Keith Kwong Hon Wong ,  Daewon Yang

发明人： Richard A. Conti ,  Thomas F. Houghton ,  Michael F. Lofaro ,  Jeffery B. Maxson ,  Ann H. McDonald ,  Yun-Yu Wang ,  Keith Kwong Hon Wong ,  Daewon Yang

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L23/53238 ,  H01L21/28556 ,  H01L21/76849 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention relates to a bilayer cap structure for interconnect structures that comprise copper metallization or other conductive metallization. Such bilayer cap structure includes a first cap layer formed by an unbiased high density plasma (HDP) chemical vapor deposition process, and a second cap layer over the first cap layer, where the second cap layer is formed by a biased high density plasma (bHDP) chemical vapor deposition process. During the bHDP chemical vapor deposition process, a low AC bias power is applied to the substrate to increase the ion bombardment on the substrate surface and to induce resputtering of the capping material, thereby forming a seamless second cap layer with excellent reactive ion etching (RIE) selectivity.

摘要翻译： 本发明涉及一种用于互连结构的双层盖结构，其包括铜金属化或其它导电金属化。 这种双层盖结构包括通过无偏高密度等离子体（HDP）化学气相沉积工艺形成的第一盖层和在第一盖层上的第二盖层，其中第二盖层由偏置的高密度等离子体（bHDP ）化学气相沉积工艺。 在bHDP化学气相沉积工艺期间，将低AC偏置功率施加到衬底上以增加衬底表面上的离子轰击并引起封盖材料的再溅射，从而形成具有优异的反应离子蚀刻（RIE）的无缝第二帽层 ）选择性。

公开(公告)号：US07129169B2

公开(公告)日：2006-10-31

申请号：US10709534

申请日：2004-05-12

申请人： Bradley P. Jones ,  Christian Lavoie ,  Robert J. Purtell ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

发明人： Bradley P. Jones ,  Christian Lavoie ,  Robert J. Purtell ,  Yun-Yu Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L21/44 ,  H01L21/3205

CPC分类号： H01L29/665 ,  H01L21/28518 ,  H01L29/7833

摘要： A method for forming a metal silicide contact for a semiconductor device includes forming a refractory metal layer over a substrate, including active and non-active area of said substrate, and forming a cap layer over the refractory metal layer. A counter tensile layer is formed over the cap layer, wherein the counter tensile layer is selected from a material such that an opposing directional stress is created between the counter tensile layer and the cap layer, with respect to a directional stress created between the refractory metal layer and the cap layer.

摘要翻译： 一种用于形成用于半导体器件的金属硅化物接触的方法包括在衬底上形成难熔金属层，该衬底包括所述衬底的有源区和非有源区，并在难熔金属层上形成覆盖层。 反面拉伸层形成在覆盖层上方，其中相对抗拉层选自材料，使得在相对拉伸层和盖层之间产生相对的方向应力，相对于难熔金属之间产生的方向应力 层和盖层。