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公开(公告)号：US10038114B2
公开(公告)日：2018-07-31
申请号：US15606281
申请日：2017-05-26
Applicant: Renesas Electronics Corporation
Inventor： Shinichi Watanuki , Atsuro Inada
IPC: G02B6/13 , H01L31/18 , H01L31/0232
CPC classification number: H01L31/18 , G02B6/122 , G02B6/1223 , G02B6/13 , G02B6/136 , G02F1/025 , H01L31/02325
Abstract: A semiconductor substrate, an insulating layer made of silicon oxide formed on the semiconductor substrate and a semiconductor layer made of silicon formed on the insulating layer are provided, and the semiconductor layer constitutes an optical waveguide in an optical signal transmission line section and an optical modulator in an optical modulation section. Also, the insulating layer is removed except for a part thereof to have a hollow structure with a cavity, and both side surfaces and a lower surface of each of the semiconductor layers constituting the optical waveguide and the optical modulator are exposed and covered with air.
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Patent Agency Ranking
公开(公告)号：US20140162447A1
公开(公告)日：2014-06-12
申请号：US13709250
申请日：2012-12-10
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION , GLOBALFOUNDRIES, INC. , RENESAS ELECTRONICS CORPORATION
Inventor： Lisa F. Edge , Martin M. Frank , Balasubramanian S. Haran , Atsuro Inada , Sivananda K. Kanakasabapathy , Andreas Knorr , Vijay Narayanan , Vamsi K. Paruchuri , Soon-cheon Seo
IPC: H01L21/28
CPC classification number: H01L29/66795 , H01L29/41791
Abstract: A method for fabricating a field effect transistor device includes patterning a fin on substrate, patterning a gate stack over a portion of the fin and a portion of an insulator layer arranged on the substrate, forming a protective barrier over the gate stack, a portion of the fin and a portion of the insulator layer, the protective barrier enveloping the gate stack, depositing a second insulator layer over portions of the fin and the protective barrier, performing a first etching process to selectively remove portions of the second insulator layer to define cavities that expose portions of source and drain regions of the fin without appreciably removing the protective barrier, and depositing a conductive material in the cavities.
Abstract translation: 一种用于制造场效应晶体管器件的方法，包括对衬底上的翅片进行图案化，在栅极堆叠的一部分上构图栅极堆叠，以及布置在衬底上的绝缘体层的一部分，在栅极叠层上形成保护屏障， 所述翅片和所述绝缘体层的一部分，所述保护屏障包围所述栅极堆叠，在所述鳍片和所述保护屏障的部分上沉积第二绝缘体层，执行第一蚀刻工艺以选择性地去除所述第二绝缘体层的部分以限定空腔 其暴露鳍片的源极和漏极区域的部分，而不明显地去除保护屏障，以及在空腔中沉积导电材料。
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公开(公告)号：US10267991B2
公开(公告)日：2019-04-23
申请号：US15871569
申请日：2018-01-15
Applicant: Renesas Electronics Corporation
Inventor： Atsuro Inada
Abstract: First, half etching is performed to a semiconductor layer formed on an insulating layer to form trenches at positions of slab-portion regions in which slab portions are to be formed. After filling the trenches with an insulating film, a resist mask which covers the semiconductor layer at a projecting-portion region in which a projecting portion is to be formed and whose pattern ends are located on upper surfaces of the insulating films is formed on upper surfaces of the semiconductor layer and the insulating film, and full etching is performed to the semiconductor layer with using the resist mask and the insulating film as an etching mask, thereby forming an optical waveguide constituted of the projecting portion and the slab portions. Thereafter, a first interlayer insulating film is formed to cover the optical waveguide.
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公开(公告)号：US10078182B2
公开(公告)日：2018-09-18
申请号：US15243746
申请日：2016-08-22
Inventor： Shinichi Watanuki , Akira Mitsuiki , Atsuro Inada , Tohru Mogami , Tsuyoshi Horikawa , Keizo Kinoshita
CPC classification number: G02B6/136 , G02B6/12004 , G02B6/122 , G02B2006/12061 , G02B2006/12097 , G02F1/025 , G02F2201/063 , G02F2201/066 , G02F2202/105
Abstract: When an optical waveguide is formed, an area of an opening of a resist mask is equal to an area of a semiconductor layer for a dummy pattern exposed from the resist mask, and the semiconductor layer for the dummy pattern exposed from the resist mask has a uniform thickness in a region in which the dummy pattern is formed. As a result, an effective pattern density does not change in etching the semiconductor layer for the dummy pattern, and accordingly, it is possible to form a rib-shaped optical waveguide having desired dimensions and a desired shape.
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公开(公告)号：US09910219B2
公开(公告)日：2018-03-06
申请号：US15212170
申请日：2016-07-15
Applicant: Renesas Electronics Corporation
Inventor： Atsuro Inada
CPC classification number: G02B6/122 , G02B6/136 , G02B2006/12038 , G02B2006/12061 , G02B2006/12097
Abstract: First, half etching is performed to a semiconductor layer formed on an insulating layer to form trenches at positions of slab-portion regions in which slab portions are to be formed. After filling the trenches with an insulating film, a resist mask which covers the semiconductor layer at a projecting-portion region in which a projecting portion is to be formed and whose pattern ends are located on upper surfaces of the insulating films is formed on upper surfaces of the semiconductor layer and the insulating film, and full etching is performed to the semiconductor layer with using the resist mask and the insulating film as an etching mask, thereby forming an optical waveguide constituted of the projecting portion and the slab portions. Thereafter, a first interlayer insulating film is formed to cover the optical waveguide.
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公开(公告)号：US09696489B2
公开(公告)日：2017-07-04
申请号：US15062153
申请日：2016-03-06
Applicant: Renesas Electronics Corporation
Inventor： Shinichi Watanuki , Atsuro Inada
CPC classification number: H01L31/18 , G02B6/122 , G02B6/1223 , G02B6/13 , G02B6/136 , G02F1/025 , H01L31/02325
Abstract: A semiconductor substrate, an insulating layer made of silicon oxide formed on the semiconductor substrate and a semiconductor layer made of silicon formed on the insulating layer are provided, and the semiconductor layer constitutes an optical waveguide in an optical signal transmission line section and an optical modulator in an optical modulation section. Also, the insulating layer is removed except for a part thereof to have a hollow structure with a cavity, and both side surfaces and a lower surface of each of the semiconductor layers constituting the optical waveguide and the optical modulator are exposed and covered with air.
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