公开(公告)号：US20160254143A1

公开(公告)日：2016-09-01

申请号：US15053481

申请日：2016-02-25

Applicant: Renesas Electronics Corporation

Inventor： Toshikazu HANAWA ,  Kazuhide FUKAYA

IPC: H01L21/02

CPC classification number: H01L21/76826 ,  H01L21/02164 ,  H01L21/02282 ,  H01L21/02315 ,  H01L21/0234 ,  H01L21/76801 ,  H01L21/76819

Abstract: To provide a semiconductor device having improved reliability. After formation of a first insulating film for an interlayer insulating film by spin coating, the surface of the first insulating film is subjected to a hydrophilicity improving treatment. A second insulating film for the interlayer insulating film is then formed on the first insulating film by spin coating. The interlayer insulating film is comprised of a stacked insulating film including the first insulating film and the second insulating film thereon. The interlayer insulating film therefore can have improved surface flatness.

Abstract translation: 提供具有提高的可靠性的半导体器件。 在通过旋涂形成用于层间绝缘膜的第一绝缘膜之后，对第一绝缘膜的表面进行亲水性改善处理。 然后通过旋涂在第一绝缘膜上形成用于层间绝缘膜的第二绝缘膜。 层间绝缘膜由其上包括第一绝缘膜和第二绝缘膜的叠层绝缘膜组成。 因此，层间绝缘膜可以具有改善的表面平坦度。

公开(公告)号：US20180061769A1

公开(公告)日：2018-03-01

申请号：US15640042

申请日：2017-06-30

Applicant: Renesas Electronics Corporation

Inventor： Toshikazu HANAWA ,  Kazuhide FUKAYA ,  Makoto KOSHIMIZU

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/53223 ,  H01L21/76802 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53266

Abstract: An interlayer insulating film has via holes. A sidewall conductive layer is arranged along a sidewall surface of one via hole and contains one or more kinds selected from a group including tungsten, titanium, titanium nitride, tantalum and molybdenum. A second metal wiring layer is embedded in one via hole and contains aluminum. A plug layer is embedded in the other via hole and contains one or more kinds selected from the group including tungsten, titanium, titanium nitride, tantalum and molybdenum.

公开(公告)号：US20170062288A1

公开(公告)日：2017-03-02

申请号：US15205069

申请日：2016-07-08

Applicant: Renesas Electronics Corporation

Inventor： Toshikazu HANAWA ,  Kazuhide FUKAYA ,  Kentaro YAMADA

IPC: H01L21/66 ,  H01L21/768 ,  G01N21/84 ,  H01L23/532 ,  G01N21/73 ,  H01L21/311 ,  H01L23/522

CPC classification number: H01L22/26 ,  G01N21/68 ,  G01N21/73 ,  G01N21/84 ,  G01N2021/8411 ,  G01N2021/8427 ,  G01N2201/1247 ,  H01J37/32963 ,  H01J2237/334 ,  H01L21/31116 ,  H01L21/76802 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53266 ,  H01L23/5329

Abstract: A via hole is accurately formed in an interlayer insulating film over a metal wiring. Of emission spectra of plasma to be used for dry etching of the interlayer insulating film, the emission intensities of at least CO, CN, and AlF are monitored such that an end point of the dry etching of the interlayer insulating film is detected based on the emission intensities thereof.

Abstract translation: 在金属布线上的层间绝缘膜中精确地形成通孔。 对于用于层间绝缘膜的干式蚀刻的等离子体的发射光谱，至少监测CO，CN和AlF的发射强度，使得基于层间绝缘膜的干蚀刻的终点被检测 发射强度。

公开(公告)号：US20200066646A1

公开(公告)日：2020-02-27

申请号：US16668802

申请日：2019-10-30

Applicant: Renesas Electronics Corporation

Inventor： Toshikazu HANAWA ,  Kazuhide FUKAYA ,  Makoto KOSHIMIZU

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522

Abstract: An interlayer insulating film has via holes. A sidewall conductive layer is arranged along a sidewall surface of one via hole and contains one or more kinds selected from a group including tungsten, titanium, titanium nitride, tantalum and molybdenum. A second metal wiring layer is embedded in one via hole and contains aluminum. A plug layer is embedded in the other via hole and contains one or more kinds selected from the group including tungsten, titanium, titanium nitride, tantalum and molybdenum.

公开(公告)号：US20170287794A1

公开(公告)日：2017-10-05

申请号：US15630385

申请日：2017-06-22

Applicant: Renesas Electronics Corporation

Inventor： Toshikazu HANAWA ,  Kazuhide FUKAYA ,  Kentaro YAMADA

IPC: H01L21/66 ,  H01L21/768 ,  H01L23/522 ,  H01L21/311

CPC classification number: H01L22/26 ,  G01N21/68 ,  G01N21/73 ,  G01N21/84 ,  G01N2021/8411 ,  G01N2021/8427 ,  G01N2201/1247 ,  H01J37/32963 ,  H01J2237/334 ,  H01L21/31116 ,  H01L21/76802 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53266 ,  H01L23/5329

Abstract: A via hole is accurately formed in an interlayer insulating film over a metal wiring. Of emission spectra of plasma to be used for dry etching of the interlayer insulating film, the emission intensities of at least CO, CN, and AlF are monitored such that an end point of the dry etching of the interlayer insulating film is detected based on the emission intensities thereof.