公开(公告)号：US20150234758A1

公开(公告)日：2015-08-20

申请号：US14696372

申请日：2015-04-24

Applicant: Renesas Electronics Corporation

Inventor： Yasuhiro YOSHIKAWA ,  Motoo SUWA

IPC: G06F13/28 ,  G11C7/10

CPC classification number: G06F13/287 ,  G06F13/385 ,  G06F13/4068 ,  G11C7/1072 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/0216 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2224/13099 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: There is a need to alleviate or reduce crosstalk between bonding wires or wires in a device substrate. One selection configuration divides a multiplexed terminal group into three groups according to functions differently from another selection configuration that divides the multiplexed terminal group into two groups. A first multi-pin semiconductor device is configured such that the groups are successively arranged along one edge of the chip. The first semiconductor device connects with a second semiconductor device via a multiplexed terminal group. The multiplexed terminal group includes first through third interface terminal groups that differ from each other in signal input/output configurations.

Abstract translation: 需要减轻或减少器件衬底中的接合线或导线之间的串扰。 一种选择配置根据功能将多路复用终端组划分为三组，与将多路复用终端组划分为两组的另一选择配置不同。 第一多针半导体器件被配置为使得这些组沿着芯片的一个边缘依次布置。 第一半导体器件经由多路复用端子组与第二半导体器件连接。 多路复用终端组包括在信号输入/输出配置中彼此不同的第一至第三接口端子组。