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公开(公告)号:US20250022794A1
公开(公告)日:2025-01-16
申请号:US18768246
申请日:2024-07-10
Applicant: Renesas Electronics Corporation
Inventor: Takayuki IGARASHI , Yasutaka NAKASHIBA
IPC: H01L23/522 , H01L27/02
Abstract: A semiconductor device includes a semiconductor substrate, a first coil, a second coil, a third coil, and a fourth coil, an insulating layer, and a first shield. The semiconductor substrate has a device region and a peripheral region. The peripheral region is present around the device region in a plan view. The first coil and the second coil are arranged on the device region and are arranged in a first direction in a plan view. The third coil and the fourth coil are respectively opposed to the first coil and the second coil via the insulating layer. The first shield is arranged between the semiconductor substrate and the first and second coils and overlaps with the first coil and the second coil in a plan view. A width of the first shield in a second direction orthogonal to the first direction is larger than a width of the first coil in the second direction and a width of the second coil in the second direction. The first shield is electrically connected to a reference potential.
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公开(公告)号:US20240429159A1
公开(公告)日:2024-12-26
申请号:US18666149
申请日:2024-05-16
Applicant: Renesas Electronics Corporation
Inventor: Yasutaka NAKASHIBA , Takayuki IGARASHI
IPC: H01L23/522 , H01L23/528 , H01L27/01
Abstract: Providing a semiconductor device that can suppress the heat generation in a transformer. The semiconductor device comprises first, second, third and fourth coils, a lead wire, and an insulating layer. The lead wire is formed on the same layer as the first and second coils. The first and second coils are adjacent to each other through the lead wire in a plan view and are electrically connected in series through the lead wire. The insulating layer covers the first and second coils, and the lead wire. The third coil is formed on the first coil so as to face the first coil through the insulating layer. The fourth coil is formed on the second coil so as to face the second coil through the insulating layer. The third and fourth coils are adjacent to each other in a plan view and are electrically connected to each other.
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公开(公告)号:US20240038888A1
公开(公告)日:2024-02-01
申请号:US18334763
申请日:2023-06-14
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Makoto KOSHIMIZU , Yasutaka NAKASHIBA , Tohru KAWAI
IPC: H01L29/78 , H01L27/088 , H01L29/06
CPC classification number: H01L29/7817 , H01L27/088 , H01L29/0615
Abstract: A semiconductor substrate includes an n-type substrate region, an n-type first semiconductor region and a second semiconductor region disposed at different positions on the n-type substrate region, an n-type buried layer formed on the n-type first semiconductor region and on the second semiconductor region, a p-type third semiconductor region and a p-type fourth semiconductor region formed on the n-type buried layer and spaced apart from each other, and an n-type fifth semiconductor region that reaches an upper surface of the semiconductor substrate from the n-type buried layer. The n-type buried layer, the n-type first semiconductor region, and the n-type substrate region are present under the p-type third semiconductor region and the n-type fifth semiconductor region. A first transistor is formed in an upper portion of the p-type third semiconductor region, and a second transistor is formed in an upper portion of the p-type fourth semiconductor region.
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公开(公告)号:US20240006344A1
公开(公告)日:2024-01-04
申请号:US18330648
申请日:2023-06-07
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Yasutaka NAKASHIBA , Toshiyuki HATA , Hiroshi YANAGIGAWA , Tomohisa SEKIGUCHI
IPC: H01L23/00 , H01L23/58 , H01L29/78 , H01L21/78 , H01L21/306
CPC classification number: H01L23/562 , H01L24/32 , H01L23/585 , H01L29/7813 , H01L21/78 , H01L21/30604 , H01L2224/32225
Abstract: A semiconductor device includes a chip mounting portion and a semiconductor chip provided on the chip mounting portion via a conductive adhesive material. Here, a planar shape of the semiconductor chip is a quadrangular shape. Also, in plan view, a plurality of thin portions is formed at a plurality of corner portions of the semiconductor chip, respectively. Also, the plurality of thin portions respectively formed at the plurality of corner portions of the semiconductor chip is spaced apart from each other. Further, thickness of each of the plurality of thin portions is smaller than a thickness of the semiconductor chip other than the plurality of the thin portions.
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公开(公告)号:US20230251418A1
公开(公告)日:2023-08-10
申请号:US17666948
申请日:2022-02-08
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Yasutaka NAKASHIBA , Shinichi WATANUKI
CPC classification number: G02B6/12004 , G02B6/125 , G02B6/136 , G02B6/132 , G02B2006/12061 , G02B2006/12142
Abstract: A semiconductor device includes: a semiconductor substrate; an insulating layer formed on the semiconductor substrate; an optical waveguide formed on the insulating layer, extending in a first direction in a plan view, and being made of silicon; and an interlayer insulating film formed on the insulating layer to cover the optical waveguide. In this case, a crystal surface of a side surface of the optical waveguide is a (111) surface.
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公开(公告)号:US20220376040A1
公开(公告)日:2022-11-24
申请号:US17717724
申请日:2022-04-11
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Makoto KOSHIMIZU , Yasutaka NAKASHIBA
Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric film formed on the semiconductor substrate, a gate electrode formed on the gate dielectric film, a field plate portion which is integrally formed with the gate electrode, a step insulating film in contact with the field plate portion, a high dielectric constant film in contact with the step insulating film and having a higher dielectric constant than silicon.
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7.
公开(公告)号:US20210165160A1
公开(公告)日:2021-06-03
申请号:US16700580
申请日:2019-12-02
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Tetsuya IIDA , Yasutaka NAKASHIBA , Seigo NAMIOKA , Tomoo NAKAYAMA
Abstract: A semiconductor device includes a semiconductor substrate having a first surface, a second surface opposite to the first surface, and having a first recess portion formed on the first surface, a first cladding layer located in the first recess portion, and a first optical waveguide formed on the first cladding layer. The first optical waveguide overlaps with the first cladding layer in plan view.
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公开(公告)号:US20210109383A1
公开(公告)日:2021-04-15
申请号:US16601280
申请日:2019-10-14
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Yasutaka NAKASHIBA , Tohru KAWAI
Abstract: A semiconductor device includes a first insulating layer, an optical waveguide, a first slab portion, a second insulating layer, and a conductive layer. The optical waveguide is formed on the first insulating layer and has a first side surface and a second side surface. The first slab portion is adjacent to the first side surface. The second insulating layer is formed on the optical waveguide. The conductive layer is formed on the second insulating layer. The optical waveguide has a first conductivity type. The first slab portion has first portion, second portion and third portion. The first portion has a second conductivity type opposite to the first conductivity type. The second portion is located farther from the optical waveguide than the first portion and has a first conductivity type. The third portion is formed between the optical waveguide and the second portion and has the first conductivity type.
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公开(公告)号:US20200295530A1
公开(公告)日:2020-09-17
申请号:US16811959
申请日:2020-03-06
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Tetsuya IIDA , Yasutaka NAKASHIBA
Abstract: A semiconductor device includes a cladding layer and a first optical waveguide. The first optical waveguide is formed on the first cladding layer. An end surface of the first optical waveguide is inclined relative to a vertical line perpendicular to an upper surface of the cladding layer.
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10.
公开(公告)号:US20190391327A1
公开(公告)日:2019-12-26
申请号:US16411993
申请日:2019-05-14
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Shinichi WATANUKI , Yasutaka NAKASHIBA
Abstract: The semiconductor device has an optical waveguide formed on a substrate, a first conductor film formed in the same layer as the optical waveguide, an insulating film formed on the first conductor film, a second conductor film formed on the insulating film, and a first interlayer insulating film formed on the substrate so as to cover the optical waveguide and the second conductor film. The semiconductor device includes a first contact hole reaching the first conductor film, a second contact hole reaching the second conductor film, a first contact plug formed in the first contact hole, and a second contact plug formed in the second contact hole. The first conductor film is disposed between the first contact plugs and the board, but the second conductor film is not disposed between the first contact plugs and the board.
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