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    Presenting compatible components and system conditions for computer devices
    1.
    发明申请
    Presenting compatible components and system conditions for computer devices 有权
    介绍计算机设备的兼容组件和系统条件

    公开(公告)号：US20060242030A1

    公开(公告)日：2006-10-26

    申请号：US11202732

    申请日：2005-08-12

    申请人： Richard Blanchard ,  Himanshu Gupta ,  Steven Jobs ,  Howard Miller ,  Michael Shebanek ,  Brian Smiley ,  Ralph Zazula

    发明人： Richard Blanchard ,  Himanshu Gupta ,  Steven Jobs ,  Howard Miller ,  Michael Shebanek ,  Brian Smiley ,  Ralph Zazula

    IPC分类号： G06F17/30 ,  G06Q30/00

    CPC分类号： G06Q30/06 ,  G06Q30/0253 ,  G06Q30/0633 ,  G06Q30/0641

    摘要： Presenting system and device conditions and purchasing options for components compatible with hardware devices of a computer system. In one aspect, an operating system determines the identity of a hardware device in communication with the operating system, communicates over a network to receive current purchasing information related to the hardware device, and displays components that can be selected for purchase and used with the hardware device. Another aspect provides a selectable user interface control for display in a graphical user interface that indicates a new operating condition of the computer system, different from a prior operating condition, by displaying a different appearance of the control. One embodiment has a new operating condition occurring when a component of a hardware device is within a predetermined threshold of requiring replacement, refilling, or supplementation.

    摘要翻译： 介绍与计算机系统的硬件设备兼容的组件的系统和设备条件以及采购选项。 在一个方面，操作系统确定与操作系统通信的硬件设备的身份，通过网络进行通信以接收与硬件设备相关的当前购买信息，并且显示可被选择用于购买并与硬件一起使用的组件 设备。 另一方面提供了一种用于在图形用户界面中显示的可选择的用户界面控制，其通过显示该控件的不同外观来指示与先前操作条件不同的计算机系统的新操作条件。 当硬件设备的组件处于需要更换，重新填充或补充的预定阈值内时，一个实施例具有新的操作条件。

    MOSFET device having geometry that permits frequent body contact
    4.
    发明申请
    MOSFET device having geometry that permits frequent body contact 审中-公开
    具有允许频繁接触身体的几何形状的MOSFET器件

    公开(公告)号：US20050001272A1

    公开(公告)日：2005-01-06

    申请号：US10827676

    申请日：2004-04-19

    申请人： Richard Blanchard

    发明人： Richard Blanchard

    IPC分类号： H01L29/78 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/10 ,  H01L29/94

    CPC分类号： H01L29/0692 ,  H01L21/823425 ,  H01L27/088 ,  H01L29/1087

    摘要： A MOSFET device design is provided that effectively addresses the problems arising from the parasitic bipolar transistor that is intrinsic to the device. The MOSFET device comprises: (a) a body region; (b) a plurality of body contact regions; (c) a plurality of source regions; (d) a plurality of drain regions; and (d) a gate region. In plan view, the source regions and the drain regions are arranged in orthogonal rows and columns, and at least a portion of the body contact regions are bordered by four of the source and drain regions, preferably two source regions and two drain regions.

    摘要翻译： 提供了MOSFET器件设计，可有效地解决由器件固有的寄生双极晶体管产生的问题。 MOSFET器件包括：（a）体区; （b）多个身体接触区域; （c）多个源区; （d）多个漏极区域; 和（d）栅极区域。 在平面图中，源极区域和漏极区域以正交的行和列布置，并且身体接触区域的至少一部分被源极和漏极区域中的四个区隔开，优选地是两个源极区域和两个漏极区域。

    Automatic generation of print data for print jobs based on available media attributes
    5.
    发明授权
    Automatic generation of print data for print jobs based on available media attributes 有权
    根据可用的媒体属性自动生成打印作业的打印数据

    公开(公告)号：US09282219B2

    公开(公告)日：2016-03-08

    申请号：US13310220

    申请日：2011-12-02

    申请人： Howard A. Miller ,  Richard Blanchard ,  Todd W. Ritland

    发明人： Howard A. Miller ,  Richard Blanchard ,  Todd W. Ritland

    IPC分类号： H04N1/60 ,  G06K15/02 ,  H04N1/56 ,  H04N1/46

    CPC分类号： H04N1/56 ,  H04N1/46

    摘要： The disclosed embodiments provide a system that performs a print job. During operation, the system obtains one or more available media attributes, including a media size, a border size, and/or a media type, from a printer associated with the print job. Next, the system provides the available media attributes to an application and uses the application to automatically generate and format print data for the print job based on the available media attributes. Finally, the system sends the print job to the printer, where the print job is executed using the printer.

    摘要翻译： 所公开的实施例提供执行打印作业的系统。 在操作期间，系统从与打印作业相关联的打印机获得一个或多个可用媒体属性，包括媒体大小，边框大小和/或媒体类型。 接下来，系统向应用程序提供可用的媒体属性，并使用应用程序根据可用的媒体属性自动生成和格式化打印作业的打印数据。 最后，系统将打印作业发送到使用打印机执行打印作业的打印机。

    Low capacitance two-terminal barrier controlled TVS diodes
    6.
    发明申请
    Low capacitance two-terminal barrier controlled TVS diodes 有权
    低电容两端势垒控制TVS二极管

    公开(公告)号：US20080032462A1

    公开(公告)日：2008-02-07

    申请号：US11879424

    申请日：2007-07-17

    申请人： Adrian Cogan ,  Jin Qiu ,  Richard Blanchard

    发明人： Adrian Cogan ,  Jin Qiu ,  Richard Blanchard

    IPC分类号： H01L21/329

    CPC分类号： H01L29/66136 ,  H01L27/0255 ,  H01L29/861

    摘要： A two-terminal barrier controlled TVS diode has a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and the cathode electrode, and may be arranged such that the anode region provides conductivity modulation by injecting minority carriers into the channel region during conduction of the semiconductor structure. In presently preferred form the majority carriers are electrons and the minority carriers are holes. Fabrication methods are described.

    摘要翻译： 两端势垒控制TVS二极管具有消耗区域阻挡阻挡多数载流子流过阴极区附近的沟道区域，该偏压电平低于施加在阳极电极和阴极电极之间的预定钳位电压的偏置电平，并且可布置 使得阳极区域在半导体结构的导通期间通过将少数载流子注入沟道区域来提供导电性调制。 在目前优选的形式中，多数载流子是电子，而少数载流子是空穴。 描述制造方法。

    Method for Making a Semiconductor Device Including Regions of Band-Engineered Semiconductor Superlattice to Reduce Device-On Resistance
    7.
    发明申请
    Method for Making a Semiconductor Device Including Regions of Band-Engineered Semiconductor Superlattice to Reduce Device-On Resistance 有权
    制造包含带状半导体超晶格区域的半导体器件以降低器件导通电阻的方法

    公开(公告)号：US20070012999A1

    公开(公告)日：2007-01-18

    申请号：US11534343

    申请日：2006-09-22

    申请人： Richard Blanchard

    发明人： Richard Blanchard

    IPC分类号： H01L29/76 ,  H01L21/336

    CPC分类号： H01L29/7802 ,  B82Y10/00 ,  H01L21/823807 ,  H01L29/0873 ,  H01L29/1054 ,  H01L29/152 ,  H01L29/155 ,  H01L29/158 ,  H01L29/66568 ,  H01L29/66681 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/78 ,  H01L29/7813 ,  H01L29/7816

    摘要： A method for making a semiconductor device which may include providing a substrate having a plurality of spaced apart superlattices therein, and forming source and drain regions in the substrate defining a channel region therebetween and with the plurality of spaced apart superlattices in the channel and/or drain regions. Each superlattice may include a plurality of stacked groups of layers, with each group including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one nonsemiconductor monolayer thereon. Moreover, the at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions.

    摘要翻译： 一种用于制造半导体器件的方法，其可以包括提供其中具有多个间隔开的超晶格的衬底，以及在衬底中形成源极和漏极区域，在衬底中限定沟道区域，以及沟道中的多个间隔开的超晶格和/或 漏区。 每个超晶格可以包括多个堆叠的层组，每个组包括限定基极半导体部分和至少一个非半导体单层的多个堆叠的基底半导体单层。 此外，至少一个非半导体单层可以被约束在相邻的基底半导体部分的晶格内。

    High voltage power MOSFET having low on-resistance
    8.
    发明申请
    High voltage power MOSFET having low on-resistance 有权

    公开(公告)号：US20060249788A1

    公开(公告)日：2006-11-09

    申请号：US11475640

    申请日：2006-06-27

    申请人： Richard Blanchard

    发明人： Richard Blanchard

    IPC分类号： H01L29/76

    CPC分类号： H01L29/7802 ,  H01L21/2255 ,  H01L21/2257 ,  H01L22/26 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/66712

    摘要： A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body regions have a second conductivity type. First and second source regions of the first conductivity type are respectively located in the first and second body regions. A plurality of trenches are located below the body regions in the drift region of the epitaxial layer. The trenches, which extend toward the substrate from the first and second body regions, are filled with an epitaxially layered material that includes a dopant of the second conductivity type. The dopant is diffused from the trenches into portions of the epitaxial layer adjacent the trenches.

    Low capacitance two-terminal barrier controlled TVS diodes
    9.
    发明申请
    Low capacitance two-terminal barrier controlled TVS diodes 有权

    公开(公告)号：US20060131605A1

    公开(公告)日：2006-06-22

    申请号：US11020507

    申请日：2004-12-22

    申请人： Adrian Cogan ,  Jin Qiu ,  Richard Blanchard

    发明人： Adrian Cogan ,  Jin Qiu ,  Richard Blanchard

    IPC分类号： H01L29/74 ,  H01L23/62

    CPC分类号： H01L29/66136 ,  H01L27/0255 ,  H01L29/861

    摘要： A two-terminal barrier controlled TVS diode has a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and the cathode electrode, and may be arranged such that the anode region provides conductivity modulation by injecting minority carriers into the channel region during conduction of the semiconductor structure. In presently preferred form the majority carriers are electrons and the minority carriers are holes. Fabrication methods are described.

    Technique for fabricating multilayer color sensing photodetectors
    10.
    发明申请
    Technique for fabricating multilayer color sensing photodetectors 失效

    公开(公告)号：US20060008937A1

    公开(公告)日：2006-01-12

    申请号：US10886435

    申请日：2004-07-07

    申请人： Richard Blanchard ,  Richard Robinson

    发明人： Richard Blanchard ,  Richard Robinson

    IPC分类号： H01L21/00

    CPC分类号： H01L27/14645 ,  H01L27/14647 ,  H01L27/14683 ,  H01L27/14689

    摘要： A multilayer color-sensing photodetector is fabricated in a semiconductor wafer having a single crystal structure to form a first, second and third layer of single crystal semiconductor material. A dielectric layer is formed that completely surrounds each single crystal region. A blocking layer is applied to prevent ion implantation where not desired. Ions are implanted into a predefined implant area. The semiconductor wafer is heated to create a dielectric layer part way through the single crystal semiconductor region. The second layer of single crystal semiconductor materials is formed by depositing a single crystal or polycrystalline material and annealing it to form a single crystal semiconductor. The deposited semiconductor layer is masked and etched to obtain single crystal regions directly above the previous layer. A blocking layer is applied and an ion implant is performed. After heating, there is left a region of single crystal silicon that has its sides and bottom surrounding by a dielectric border. The third layer of semiconductor material is likewise deposited and processed to form a top layer of single crystal semiconductor material.