公开(公告)号：US20090276605A1

公开(公告)日：2009-11-05

申请号：US12114945

申请日：2008-05-05

申请人： Richard L. Arndt ,  Aaron C. Brown ,  Bradly G. Frey ,  Gregory F. Pfister ,  Renato J. Recio ,  Steven M. Thurber

发明人： Richard L. Arndt ,  Aaron C. Brown ,  Bradly G. Frey ,  Gregory F. Pfister ,  Renato J. Recio ,  Steven M. Thurber

IPC分类号： G06F12/00

CPC分类号： G06F12/0646

摘要： Registering memory space for an application is performed. One or more open calls are received from an application to access one or more input/output (I/O) devices. Responsive to receiving the one or more open calls, one or more I/O map and pin calls are sent in order to register memory space for the one or more I/O devices within at least one storage area that will be accessed by the application. A verification is made as to whether the memory space to be registered is associated with the application. Responsive to the memory space being associated with the application, at least one virtual I/O bus address is received for each registered memory space of the one or more I/O devices. At least one I/O command is executed using the at least one virtual I/O bus address without intervention by an operating system or operating system image.

摘要翻译： 注册应用程序的内存空间。 从应用程序接收一个或多个打开的呼叫以访问一个或多个输入/输出（I / O）设备。 响应于接收一个或多个开放呼叫，发送一个或多个I / O映射和引脚呼叫，以便为将由应用程序访问的至少一个存储区域内的一个或多个I / O设备注册存储器空间 。 验证要注册的存储空间是否与应用程序相关联。 响应于与应用相关联的存储器空间，对于一个或多个I / O设备的每个已注册的存储器空间接收至少一个虚拟I / O总线地址。 使用至少一个虚拟I / O总线地址执行至少一个I / O命令，而无需操作系统或操作系统映像的干预。

公开(公告)号：US07908457B2

公开(公告)日：2011-03-15

申请号：US12114945

申请日：2008-05-05

申请人： Richard L. Arndt ,  Aaron C. Brown ,  Bradly G. Frey ,  Gregory F. Pfister ,  Renato J. Recio ,  Steven M. Thurber

发明人： Richard L. Arndt ,  Aaron C. Brown ,  Bradly G. Frey ,  Gregory F. Pfister ,  Renato J. Recio ,  Steven M. Thurber

IPC分类号： G06F12/00 ,  G06F9/26 ,  G06F9/34 ,  G06F12/08

CPC分类号： G06F12/0646

摘要： Registering memory space for an application is performed. One or more open calls are received from an application to access one or more input/output (I/O) devices. Responsive to receiving the one or more open calls, one or more I/O map and pin calls are sent in order to register memory space for the one or more I/O devices within at least one storage area that will be accessed by the application. A verification is made as to whether the memory space to be registered is associated with the application. Responsive to the memory space being associated with the application, at least one virtual I/O bus address is received for each registered memory space of the one or more I/O devices. At least one I/O command is executed using the at least one virtual I/O bus address without intervention by an operating system or operating system image.

摘要翻译： 注册应用程序的内存空间。 从应用程序接收一个或多个打开的呼叫以访问一个或多个输入/输出（I / O）设备。 响应于接收一个或多个开放呼叫，发送一个或多个I / O映射和引脚呼叫，以便为将由应用程序访问的至少一个存储区域内的一个或多个I / O设备注册存储器空间 。 验证要注册的存储空间是否与应用程序相关联。 响应于与应用相关联的存储器空间，对于一个或多个I / O设备的每个已注册的存储器空间接收至少一个虚拟I / O总线地址。 使用至少一个虚拟I / O总线地址执行至少一个I / O命令，而无需操作系统或操作系统映像的干预。

公开(公告)号：US07941568B2

公开(公告)日：2011-05-10

申请号：US12114954

申请日：2008-05-05

申请人： Richard L. Arndt ,  Aaron C. Brown ,  Gregory F. Pfister ,  Renato J. Recio ,  Steven M. Thurber

发明人： Richard L. Arndt ,  Aaron C. Brown ,  Gregory F. Pfister ,  Renato J. Recio ,  Steven M. Thurber

IPC分类号： G06F12/00 ,  G06F9/26 ,  G06F9/34 ,  G06F12/08

CPC分类号： G06F13/387

摘要： Registering memory space within a data processing system is performed. One or more open calls are received from an application to access one or more input/output (I/O) devices. Responsive to receiving the one or more open calls, one or more I/O map and pin calls are sent in order to register memory space for the one or more I/O devices within at least one storage area that will be accessed by the application. At least one virtual I/O bus address is received for each registered memory space of the one or more I/O devices. At least one I/O command is executed using the at least one virtual I/O bus address without intervention by an operating system or operating system image.

摘要翻译： 执行在数据处理系统内注册存储器空间。 从应用程序接收一个或多个打开的呼叫以访问一个或多个输入/输出（I / O）设备。 响应于接收一个或多个开放呼叫，发送一个或多个I / O映射和引脚呼叫，以便为将由应用程序访问的至少一个存储区域内的一个或多个I / O设备注册存储器空间 。 为一个或多个I / O设备的每个已注册的存储器空间接收至少一个虚拟I / O总线地址。 使用至少一个虚拟I / O总线地址执行至少一个I / O命令，而无需操作系统或操作系统映像的干预。

公开(公告)号：US20090276544A1

公开(公告)日：2009-11-05

申请号：US12114954

申请日：2008-05-05

申请人： Richard L. Arndt ,  Aaron C. Brown ,  Gregory F. Pfister ,  Renato J. Recio ,  Steven M. Thurber

发明人： Richard L. Arndt ,  Aaron C. Brown ,  Gregory F. Pfister ,  Renato J. Recio ,  Steven M. Thurber

IPC分类号： G06F13/10

CPC分类号： G06F13/387

摘要： Registering memory space within a data processing system is performed. One or more open calls are received from an application to access one or more input/output (I/O) devices. Responsive to receiving the one or more open calls, one or more I/O map and pin calls are sent in order to register memory space for the one or more I/O devices within at least one storage area that will be accessed by the application. At least one virtual I/O bus address is received for each registered memory space of the one or more I/O devices. At least one I/O command is executed using the at least one virtual I/O bus address without intervention by an operating system or operating system image.

摘要翻译： 执行在数据处理系统内注册存储器空间。 从应用程序接收一个或多个打开的呼叫以访问一个或多个输入/输出（I / O）设备。 响应于接收一个或多个开放呼叫，发送一个或多个I / O映射和引脚呼叫，以便为将由应用程序访问的至少一个存储区域内的一个或多个I / O设备注册存储器空间 。 为一个或多个I / O设备的每个已注册的存储器空间接收至少一个虚拟I / O总线地址。 使用至少一个虚拟I / O总线地址执行至少一个I / O命令，而无需操作系统或操作系统映像的干预。

公开(公告)号：US08544022B2

公开(公告)日：2013-09-24

申请号：US13465115

申请日：2012-05-07

申请人： Richard L. Arndt ,  Harold W. Cain, III ,  Bradly G. Frey ,  Cathy May

发明人： Richard L. Arndt ,  Harold W. Cain, III ,  Bradly G. Frey ,  Cathy May

IPC分类号： G06F9/46 ,  G06F15/00 ,  G06F11/00 ,  G06F13/24

CPC分类号： G06F9/466 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/3834 ,  G06F9/3859 ,  G06F9/3863

摘要： Mechanisms for executing a transaction in the data processing system are provided. A transaction checkpoint data structure is generated in internal registers of a processor. The transaction checkpoint data structure stores transaction checkpoint data representing a state of program registers at a time prior to execution of a corresponding transaction. The transaction, which comprises a first portion of code that is to be executed by the processor, is executed. An interrupt of the transaction is received while executing the transaction and, as a result, the transaction checkpoint data is stored to a data structure in a memory of the data processing system. A second portion of code is then executed. A state of the program registers is restored using the data structure in the memory of the data processing system in response to an event occurring causing a switch of execution of the processor back to execution of the transaction.

摘要翻译： 提供了在数据处理系统中执行事务的机制。 在处理器的内部寄存器中生成事务检查点数据结构。 事务检查点数据结构存储表示执行相应事务之前的时间的程序寄存器的状态的事务检查点数据。 执行包括由处理器执行的代码的第一部分的事务。 在执行事务时接收事务的中断，结果，事务检查点数据被存储到数据处理系统的存储器中的数据结构。 然后执行第二部分代码。 响应于发生的事件导致处理器的执行切换返回到事务的执行，使用数据处理系统的存储器中的数据结构恢复程序寄存器的状态。

公开(公告)号：US08424015B2

公开(公告)日：2013-04-16

申请号：US12894308

申请日：2010-09-30

申请人： Richard L. Arndt ,  Harold W. Cain, III ,  Bradly G. Frey ,  Cathy May

发明人： Richard L. Arndt ,  Harold W. Cain, III ,  Bradly G. Frey ,  Cathy May

IPC分类号： G06F9/46 ,  G06F15/00 ,  G06F11/00 ,  G06F13/24

CPC分类号： G06F9/466 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/3834 ,  G06F9/3859 ,  G06F9/3863

摘要： Mechanisms for executing a transaction in the data processing system are provided. A transaction checkpoint data structure is generated in internal registers of a processor. The transaction checkpoint data structure stores transaction checkpoint data representing a state of program registers at a time prior to execution of a corresponding transaction. The transaction, which comprises a first portion of code that is to be executed by the processor, is executed. An interrupt of the transaction is received while executing the transaction and, as a result, the transaction checkpoint data is stored to a data structure in a memory of the data processing system. A second portion of code is then executed. A state of the program registers is restored using the data structure in the memory of the data processing system in response to an event occurring causing a switch of execution of the processor back to execution of the transaction.

公开(公告)号：US20120246658A1

公开(公告)日：2012-09-27

申请号：US13465115

申请日：2012-05-07

申请人： Richard L. Arndt ,  Harold W. Cain, III ,  Bradly G. Frey ,  Cathy May

发明人： Richard L. Arndt ,  Harold W. Cain, III ,  Bradly G. Frey ,  Cathy May

IPC分类号： G06F9/46

CPC分类号： G06F9/466 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/3834 ,  G06F9/3859 ,  G06F9/3863

摘要： Mechanisms for executing a transaction in the data processing system are provided. A transaction checkpoint data structure is generated in internal registers of a processor. The transaction checkpoint data structure stores transaction checkpoint data representing a state of program registers at a time prior to execution of a corresponding transaction. The transaction, which comprises a first portion of code that is to be executed by the processor, is executed. An interrupt of the transaction is received while executing the transaction and, as a result, the transaction checkpoint data is stored to a data structure in a memory of the data processing system. A second portion of code is then executed. A state of the program registers is restored using the data structure in the memory of the data processing system in response to an event occurring causing a switch of execution of the processor back to execution of the transaction.

公开(公告)号：US20120084477A1

公开(公告)日：2012-04-05

申请号：US12894308

申请日：2010-09-30

申请人： Richard L. Arndt ,  Harold W. Cain, III ,  Bradly G. Frey ,  Cathy May

发明人： Richard L. Arndt ,  Harold W. Cain, III ,  Bradly G. Frey ,  Cathy May

IPC分类号： G06F13/24

CPC分类号： G06F9/466 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/3834 ,  G06F9/3859 ,  G06F9/3863

摘要： Mechanisms for executing a transaction in the data processing system are provided. A transaction checkpoint data structure is generated in internal registers of a processor. The transaction checkpoint data structure stores transaction checkpoint data representing a state of program registers at a time prior to execution of a corresponding transaction. The transaction, which comprises a first portion of code that is to be executed by the processor, is executed. An interrupt of the transaction is received while executing the transaction and, as a result, the transaction checkpoint data is stored to a data structure in a memory of the data processing system. A second portion of code is then executed. A state of the program registers is restored using the data structure in the memory of the data processing system in response to an event occurring causing a switch of execution of the processor back to execution of the transaction.

摘要翻译： 提供了在数据处理系统中执行事务的机制。 在处理器的内部寄存器中生成事务检查点数据结构。 事务检查点数据结构存储表示执行相应事务之前的时间的程序寄存器的状态的事务检查点数据。 执行包括由处理器执行的代码的第一部分的事务。 在执行事务时接收事务的中断，结果，事务检查点数据被存储到数据处理系统的存储器中的数据结构。 然后执行第二部分代码。 响应于发生的事件导致处理器的执行切换返回到事务的执行，使用数据处理系统的存储器中的数据结构恢复程序寄存器的状态。

公开(公告)号：US07941577B2

公开(公告)日：2011-05-10

申请号：US12139063

申请日：2008-06-13

申请人： Richard L. Arndt ,  Patrick A. Buckland ,  Harvey G. Kiel ,  Renato J. Recio ,  Jaya Srikrishnan

发明人： Richard L. Arndt ,  Patrick A. Buckland ,  Harvey G. Kiel ,  Renato J. Recio ,  Jaya Srikrishnan

IPC分类号： G06F13/28 ,  G06F3/00 ,  G06F9/34

CPC分类号： G06F9/45537

摘要： A method, computer program product, and distributed data processing system that allows a system image within a multiple system image virtual server to directly expose a portion, or all, of its associated system memory to a shared PCI adapter without having to go through a trusted component, such as a Hypervisor. Specifically, the present invention is directed to a mechanism for sharing conventional PCI I/O adapters, PCI-X I/O Adapters, PCI-Express I/O Adapters, and, in general, any I/O adapter that uses a memory mapped I/O interface for communications.

摘要翻译： 一种方法，计算机程序产品和分布式数据处理系统，其允许多系统映像虚拟服务器内的系统映像将其相关系统存储器的一部分或全部直接暴露给共享PCI适配器，而无需经过可信任的 组件，如Hypervisor。 具体地，本发明涉及用于共享常规PCI I / O适配器，PCI-X I / O适配器，PCI-Express I / O适配器的机制，并且一般地，使用使用存储器映射的任何I / O适配器 I / O接口进行通讯。

公开(公告)号：US07681083B2

公开(公告)日：2010-03-16

申请号：US12105955

申请日：2008-04-18

申请人： Richard L. Arndt ,  Patrick A. Buckland ,  Gregory M. Nordstrom ,  Steven M. Thurber

发明人： Richard L. Arndt ,  Patrick A. Buckland ,  Gregory M. Nordstrom ,  Steven M. Thurber

IPC分类号： G06F11/00

CPC分类号： G06F11/2736

摘要： Method, apparatus and system for isolating input/output adapter error domains in a data processing system. Errors occurring in one input/output adapter are isolated from other input/output adapters of the data processing system by functionality in a host bridge that connects the input/output adapters to a system bus of the data processing system, thus permitting the use of low cost, industry standard switches and bridges external to the host bridge.

摘要翻译： 用于在数据处理系统中隔离输入/输出适配器错误域的方法，装置和系统。 在一个输入/输出适配器中发生的错误与数据处理系统的其他输入/输出适配器隔离，主机桥中的功能将输入/输出适配器连接到数据处理系统的系统总线，从而允许使用低 成本，行业标准交换机和主桥外部的桥梁。