公开(公告)号：US06223290B1

公开(公告)日：2001-04-24

申请号：US09074475

申请日：1998-05-07

申请人： Robert E. Larsen ,  Peter K. Hazen ,  Sandeep K. Guliani ,  Robert N. Hasbun ,  Sanjay S. Talreja ,  Collin Ong ,  Charles W. Brown ,  Terry L. Kendall

发明人： Robert E. Larsen ,  Peter K. Hazen ,  Sandeep K. Guliani ,  Robert N. Hasbun ,  Sanjay S. Talreja ,  Collin Ong ,  Charles W. Brown ,  Terry L. Kendall

IPC分类号： H04B116

CPC分类号： H04W12/12 ,  H04W88/02

摘要： A method and apparatus for controlling use of an electronic system is described. Use of the electronic system is controlled by programming at least one unique code into an auxiliary memory of the electronic system. The auxiliary memory is a permanently lockable memory that is located outside of a main memory array space. The unique code is compared to at least one component code. Use of the electronic system is controlled based on a predefined relationship between the unique code and the component code.

摘要翻译： 描述了一种用于控制电子系统的使用的方法和装置。 通过将至少一个唯一代码编程到电子系统的辅助存储器中来控制电子系统的使用。 辅助存储器是位于主存储器阵列空间外部的永久可锁存储器。 将唯一代码与至少一个组件代码进行比较。 基于唯一代码和组件代码之间的预定关系来控制电子系统的使用。

公开(公告)号：US06182189B2

公开(公告)日：2001-01-30

申请号：US09002691

申请日：1998-01-05

申请人： Ranjeet Alexis ,  Peter K. Hazen ,  Charles W. Brown ,  Robert E. Larsen

发明人： Ranjeet Alexis ,  Peter K. Hazen ,  Charles W. Brown ,  Robert E. Larsen

IPC分类号： G06F1300

CPC分类号： G06F13/4243

摘要： An interface for a read-while-write memory. A memory device includes a single-chip memory array and an interface that is responsive to one or more commands to configure the memory array in a read-while-write configuration.

摘要翻译： 读写时存储器的接口。 存储器件包括单芯片存储器阵列和响应于一个或多个命令以配置读写配置的存储器阵列的接口。

公开(公告)号：US6088264A

公开(公告)日：2000-07-11

申请号：US2649

申请日：1998-01-05

申请人： Peter K. Hazen ,  Ranjeet Alexis ,  Robert E. Larsen ,  Charles W. Brown ,  Sanjay Talreja

发明人： Peter K. Hazen ,  Ranjeet Alexis ,  Robert E. Larsen ,  Charles W. Brown ,  Sanjay Talreja

IPC分类号： G11C16/02 ,  G11C16/10 ,  G11C16/26 ,  G11C16/04

CPC分类号： G11C16/10 ,  G11C16/26 ,  G11C2216/22

摘要： A method and apparatus for partitioning a flash memory device is provided. The flash memory device includes a plurality of partitions, each partition able to be read, written, or erased simultaneously with the other partitions.

摘要翻译： 提供了一种用于分区闪速存储器件的方法和装置。 闪存设备包括多个分区，每个分区能够与其他分区同时读取，写入或擦除。

公开(公告)号：US06201739B1

公开(公告)日：2001-03-13

申请号：US08717214

申请日：1996-09-20

申请人： Charles W. Brown ,  Peter K. Hazen

发明人： Charles W. Brown ,  Peter K. Hazen

IPC分类号： G11C1604

CPC分类号： G06F9/4406 ,  G06F9/4403 ,  G06F9/44573 ,  G11C16/16 ,  G11C2216/20

摘要： A method and apparatus for preempting an operation in a nonvolatile writeable memory is performed using a pin. Preempting an operation is accomplished by either suspending the operation or by aborting the operation. Once an operation is suspended in the nonvolatile writeable memory, other operations can then be performed. Subsequently the suspended operation may be resumed.

摘要翻译： 使用引脚执行用于抢占非易失性可写存储器中的操作的方法和装置。 通过暂停操作或中止操作来实现操作。 一旦在非易失性可写存储器中暂停操作，则可以执行其他操作。 随后可以恢复暂停的操作。

公开(公告)号：US5937424A

公开(公告)日：1999-08-10

申请号：US807385

申请日：1997-02-27

申请人： David A. Leak ,  Fasil G. Bekele ,  Thomas C. Price ,  Alan E. Baker ,  Charles W. Brown ,  Peter K. Hazen ,  Vishram Prakash Dalvi ,  Rodney R. Rozman ,  Christopher John Haid ,  Jerry Kreifels

发明人： David A. Leak ,  Fasil G. Bekele ,  Thomas C. Price ,  Alan E. Baker ,  Charles W. Brown ,  Peter K. Hazen ,  Vishram Prakash Dalvi ,  Rodney R. Rozman ,  Christopher John Haid ,  Jerry Kreifels

IPC分类号： G06F12/00 ,  G11C16/10 ,  G11C16/26 ,  G11C11/34

CPC分类号： G11C16/10 ,  G11C16/26 ,  G11C2216/20

摘要： A method and apparatus suspend a program operation in a nonvolatile writeable memory. The nonvolatile writeable memory includes a memory array, a command register, and memory array control circuitry. The command register decodes a program suspend command and provides a suspend signal as an output. The memory array control circuitry is coupled to receive the suspend signal from the command register. The memory array control circuitry performs a program operation in which data is written to the memory array. The memory array control circuitry suspends the program operation upon receiving the suspend signal.

摘要翻译： 方法和装置将程序操作挂起在非易失性可写存储器中。 非易失性可写存储器包括存储器阵列，命令寄存器和存储器阵列控制电路。 命令寄存器解码程序挂起命令并提供挂起信号作为输出。 存储器阵列控制电路被耦合以从命令寄存器接收挂起信号。 存储器阵列控制电路执行将数据写入存储器阵列的程序操作。 存储器阵列控制电路在接收到暂停信号时暂停编程操作。

公开(公告)号：US06633950B1

公开(公告)日：2003-10-14

申请号：US09653768

申请日：2000-09-01

申请人： Charles W. Brown ,  Peter K. Hazen

发明人： Charles W. Brown ,  Peter K. Hazen

IPC分类号： G06F1200

CPC分类号： G06F9/4406 ,  G06F9/4403 ,  G06F9/44573 ,  G11C16/16 ,  G11C2216/20

摘要： A method and apparatus for preempting an operation in a nonvolatile writeable memory is performed using a pin. Preempting an operation is accomplished by either suspending the operation or by aborting the operation. Once an operation is suspended in the nonvolatile writeable memory, other operations can then be performed. Subsequently the suspended operation may be resumed.

摘要翻译： 使用引脚执行用于抢占非易失性可写存储器中的操作的方法和装置。 通过暂停操作或中止操作来实现操作。 一旦在非易失性可写存储器中暂停操作，则可以执行其他操作。 随后可以恢复暂停的操作。

公开(公告)号：US6148360A

公开(公告)日：2000-11-14

申请号：US718216

申请日：1996-09-20

申请人： David A. Leak ,  Fasil G. Bekele ,  Thomas C. Price ,  Alan E. Baker ,  Charles W. Brown ,  Peter K. Hazen ,  Vishram Prakash Dalvi ,  Rodney R. Rozman ,  Christopher John Haid ,  Jerry Kreifels

发明人： David A. Leak ,  Fasil G. Bekele ,  Thomas C. Price ,  Alan E. Baker ,  Charles W. Brown ,  Peter K. Hazen ,  Vishram Prakash Dalvi ,  Rodney R. Rozman ,  Christopher John Haid ,  Jerry Kreifels

IPC分类号： G06F12/00 ,  G11C16/10 ,  G11C16/26 ,  G06F13/24

CPC分类号： G11C16/10 ,  G11C16/26 ,  G11C2216/20

摘要： A method and apparatus suspend a program operation in a nonvolatile writeable memory. The nonvolatile writeable memory includes a memory array, a command register and memory array control circuitry. The command register decodes a program suspend command and provides a suspend signal as an output. The memory array control circuitry is coupled to receive the suspend signal from the command register. The memory array control circuitry performs a program operation in which data is written to the memory array. The memory array control circuitry suspends the program operation upon receiving the suspend signal.

摘要翻译： 方法和装置将程序操作挂起在非易失性可写存储器中。 非易失性可写存储器包括存储器阵列，命令寄存器和存储器阵列控制电路。 命令寄存器解码程序挂起命令并提供挂起信号作为输出。 存储器阵列控制电路被耦合以从命令寄存器接收挂起信号。 存储器阵列控制电路执行将数据写入存储器阵列的程序操作。 存储器阵列控制电路在接收到暂停信号时暂停编程操作。

公开(公告)号：US5940861A

公开(公告)日：1999-08-17

申请号：US717268

申请日：1996-09-20

申请人： Charles W. Brown ,  Peter K. Hazen

发明人： Charles W. Brown ,  Peter K. Hazen

IPC分类号： G11C16/10 ,  G11C16/26 ,  G06F12/02

CPC分类号： G11C16/26 ,  G11C16/10 ,  G11C2216/20

摘要： A method and apparatus suspend operations in a flash memory in order to read code from the flash memory. A system comprises a processor and a nonvolatile writeable memory coupled together. A non-read operation is preempted in the nonvolatile writeable memory responsive to an input at a pin of the nonvolatile writeable memory. The preemption occurs by either suspending the non-read operation or aborting the non-read operation. Code is read from the nonvolatile writeable memory and provided to the processor. Subsequently, the non-read operation is resumed at where it was suspended, or is started anew.

摘要翻译： 一种方法和装置将闪存中的操作暂停以便从闪速存储器读取代码。 系统包括耦合在一起的处理器和非易失性可写存储器。 响应于在非易失性可写存储器的引脚处的输入，非易失性可写存储器中的非读操作被抢占。 抢占是通过暂停非读操作或中止非读操作来实现的。 代码从非易失性可写存储器读取并提供给处理器。 随后，非读取操作在停止的位置恢复，或重新启动。

公开(公告)号：USD373109S

公开(公告)日：1996-08-27

申请号：US21863

申请日：1994-04-25

申请人： Charles W. Brown

设计人： Charles W. Brown

公开(公告)号：US4030210A

公开(公告)日：1977-06-21

申请号：US445593

申请日：1974-02-25

申请人： Robert C. Stebbins ,  Brockenbrough S. Allen ,  Charles W. Brown

发明人： Robert C. Stebbins ,  Brockenbrough S. Allen ,  Charles W. Brown

IPC分类号： G09B23/36

CPC分类号： G09B23/36

摘要： A method of and means for demonstrating organic evolution, particularly as it involves the mechanism of natural selection. Background panels of multicolor and intricate design or pattern are used to provide simulated natural environments, and thin chips of different colors and shades -- and, in some instances, of different sizes and shapes -- are used to provide simulated animals or plants to be placed on the background panels. A population of a predetermined number of chips of a predetermined mixture of colors -- say, for instance, an equal number of from ten to twenty different colors -- is selected. The chips constituting the selected population are then spread in a single layer more or less uniformly on the surface of the background panel, and preferably in spaced relation, so that each chip is in plain view and is more or less detectible -- depending upon the color contrast existing between each chip, respectively, and the associated area of the background panel. Humans, for whom the demonstration is to be conducted, act as predators and remove from the panels a predetermined portion of the chips -- say, for instance, seventy-five percent of the total population placed on the panel. The surviving chips are then counted and noted for color, and each is reproduced in equal amount so as, for instance, to restore the original population. Reproduction is carried out by mating surviving chips and providing additional chips as simulated offspring, as are dictated by genetic demands, indicated on specially formed chips and the use of a chance device such as a specially constructed die or the like. Various aspects of natural selection may be demonstrated by this invention, including reproduction by monohybrid crosses, dihybrid crosses, and trihybrid crosses. The removal of chips as by predators, followed by reproduction for restoring the population, may be repeated any desired number of times.