公开(公告)号：US07525199B1

公开(公告)日：2009-04-28

申请号：US10851835

申请日：2004-05-21

申请人： Gary R. Lauterbach ,  Danny Cohen ,  Robert J. Drost

发明人： Gary R. Lauterbach ,  Danny Cohen ,  Robert J. Drost

IPC分类号： H01L23/48

CPC分类号： H01L23/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/00012 ,  H01L2924/00

摘要： A plurality of integrated circuit packages are disposed on a substrate. The plurality of integrated circuit packages includes a first type of integrated circuit package that has an inactive side facing the substrate and an active side facing away from the substrate. The plurality of integrated circuit packages also includes a second type of integrated circuit package that has an inactive side facing away from the substrate and an active side facing the substrate. The first type of integrated circuit package and the second type of integrated circuit package are disposed such that a proximity communication enabled portion of the first type of integrated circuit package is aligned with a proximity communication enabled portion of the second type of integrated circuit package.

摘要翻译： 多个集成电路封装设置在基板上。 多个集成电路封装包括第一类型的集成电路封装，其具有面向基板的无效侧和远离基板的有源侧。 多个集成电路封装还包括第二类型的集成电路封装，其具有背离衬底的无效侧和面向衬底的有源侧。 第一类型的集成电路封装和第二类型的集成电路封装被布置成使得第一类型的集成电路封装的邻近通信使能部分与第二类型的集成电路封装的接近通信使能部分对准。

公开(公告)号：US08166644B2

公开(公告)日：2012-05-01

申请号：US12498282

申请日：2009-07-06

申请人： Robert J. Drost ,  Gary R. Lauterbach ,  Danny Cohen

发明人： Robert J. Drost ,  Gary R. Lauterbach ,  Danny Cohen

IPC分类号： H05K3/30

CPC分类号： H01L23/48 ,  H01L25/0652 ,  H01L2225/06527 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10T29/49133 ,  Y10T29/49169 ,  H01L2924/00

摘要： One embodiment of the present invention provides a system that facilitates capacitive communication between integrated circuit chips. The system includes a substrate having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. The system additionally includes an integrated circuit chip having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. Additionally, the integrated circuit chip is pressed against the substrate such that the active face of the integrated circuit chip is parallel to and adjacent to the active face of the substrate, and capacitive signal pads on the active face of the integrated circuit chip overlap signal pads on the active face of the substrate. The arrangement of the substrate and integrated circuit chip facilitates communication between the integrated circuit chip and the substrate through capacitive coupling via the overlapping signal pads.

摘要翻译： 本发明的一个实施例提供一种促进集成电路芯片之间的电容性通信的系统。 该系统包括具有活动面的衬底，有源电路和信号垫位于该衬底上，以及与主动面相对的背面。 该系统还包括集成电路芯片，其具有有源电路和信号焊盘所在的有源面以及与有源面相对的背面。 此外，集成电路芯片被压靠在基板上，使得集成电路芯片的有源面平行于并邻近衬底的有源面，并且集成电路芯片的有源面上的电容性信号焊盘与信号焊盘重叠 在基板的主动面上。 衬底和集成电路芯片的布置通过经由重叠的信号焊盘的电容耦合便于集成电路芯片和衬底之间的通信。

公开(公告)号：US20090269884A1

公开(公告)日：2009-10-29

申请号：US12498282

申请日：2009-07-06

申请人： Robert J. Drost ,  Gary R. Lauterbach ,  Danny Cohen

发明人： Robert J. Drost ,  Gary R. Lauterbach ,  Danny Cohen

IPC分类号： H01L21/98

CPC分类号： H01L23/48 ,  H01L25/0652 ,  H01L2225/06527 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10T29/49133 ,  Y10T29/49169 ,  H01L2924/00

摘要： One embodiment of the present invention provides a system that facilitates capacitive communication between integrated circuit chips. The system includes a substrate having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. The system additionally includes an integrated circuit chip having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. Additionally, the integrated circuit chip is pressed against the substrate such that the active face of the integrated circuit chip is parallel to and adjacent to the active face of the substrate, and capacitive signal pads on the active face of the integrated circuit chip overlap signal pads on the active face of the substrate. The arrangement of the substrate and integrated circuit chip facilitates communication between the integrated circuit chip and the substrate through capacitive coupling via the overlapping signal pads.

摘要翻译： 本发明的一个实施例提供一种促进集成电路芯片之间的电容性通信的系统。 该系统包括具有活动面的衬底，有源电路和信号垫位于该衬底上，以及与主动面相对的背面。 该系统还包括具有主动面的集成电路芯片，有源电路和信号焊盘所在的面以及与主动面相对的背面。 此外，集成电路芯片被压靠在基板上，使得集成电路芯片的有源面平行于并邻近衬底的有源面，并且集成电路芯片的有源面上的电容性信号焊盘与信号焊盘重叠 在基板的主动面上。 衬底和集成电路芯片的布置通过经由重叠的信号焊盘的电容耦合便于集成电路芯片和衬底之间的通信。

公开(公告)号：US07573720B1

公开(公告)日：2009-08-11

申请号：US11154392

申请日：2005-06-15

申请人： Robert J. Drost ,  Gary R. Lauterbach ,  Danny Cohen

发明人： Robert J. Drost ,  Gary R. Lauterbach ,  Danny Cohen

IPC分类号： H05K7/00

CPC分类号： H01L23/48 ,  H01L25/0652 ,  H01L2225/06527 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10T29/49133 ,  Y10T29/49169 ,  H01L2924/00

摘要： One embodiment of the present invention provides a system that facilitates capacitive communication between integrated circuit chips. The system includes a substrate having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. The system additionally includes an integrated circuit chip having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. Additionally, the integrated circuit chip is pressed against the substrate such that the active face of the integrated circuit chip is parallel to and adjacent to the active face of the substrate, and capacitive signal pads on the active face of the integrated circuit chip overlap signal pads on the active face of the substrate. The arrangement of the substrate and integrated circuit chip facilitates communication between the integrated circuit chip and the substrate through capacitive coupling via the overlapping signal pads.

摘要翻译： 本发明的一个实施例提供一种促进集成电路芯片之间的电容性通信的系统。 该系统包括具有活动面的衬底，有源电路和信号垫位于该衬底上，以及与主动面相对的背面。 该系统还包括具有主动面的集成电路芯片，有源电路和信号焊盘所在的面以及与主动面相对的背面。 此外，集成电路芯片被压靠在基板上，使得集成电路芯片的有源面平行于并邻近衬底的有源面，并且集成电路芯片的有源面上的电容性信号焊盘与信号焊盘重叠 在基板的主动面上。 衬底和集成电路芯片的布置通过经由重叠的信号焊盘的电容耦合便于集成电路芯片和衬底之间的通信。

公开(公告)号：US07693424B1

公开(公告)日：2010-04-06

申请号：US11165917

申请日：2005-06-24

申请人： Ashok V. Krishnamoorthy ,  Danny Cohen ,  Robert J. Drost

发明人： Ashok V. Krishnamoorthy ,  Danny Cohen ,  Robert J. Drost

IPC分类号： H04B10/00

CPC分类号： G02B6/43 ,  G02B6/4204 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2225/06527 ,  H01L2924/0002 ,  H01L2924/00

摘要： A system that facilitates high-speed data transfer between integrated circuit chips. The system contains a first integrated circuit chip, which includes a capacitive receiver and an electrical-to-optical transceiver. The capacitive receiver receives a capacitively coupled voltage signal transmitted from a corresponding capacitive transmitter located on a second integrated circuit chip and converts the capacitively coupled voltage signal into an electrical signal. The electrical-to-optical transceiver converts the electrical signal to an optical signal and transmits the optical signal to an optical device through optical coupling.

摘要翻译： 一种促进集成电路芯片之间高速数据传输的系统。 该系统包含第一集成电路芯片，其包括电容接收器和电对光收发器。 电容式接收器接收从位于第二集成电路芯片上的对应的电容式发射机发送的电容耦合电压信号，并将电容耦合的电压信号转换为电信号。 电光收发器将电信号转换为光信号，并通过光耦合将光信号传输到光学装置。

公开(公告)号：US07460035B1

公开(公告)日：2008-12-02

申请号：US11773181

申请日：2007-07-03

申请人： Ronald Ho ,  Danny Cohen ,  Robert J. Drost

发明人： Ronald Ho ,  Danny Cohen ,  Robert J. Drost

IPC分类号： H03M5/00

CPC分类号： H03M5/12

摘要： Embodiments of an encoding circuit to communicate a sequence of words are described. This encoding circuit includes an encoding module that is configured to receive a first sequence of words and to generate a DC-balanced second sequence of words based on the first sequence of words, where communicating the second sequence of words consumes less energy than communicating a third sequence of words that includes words in the first sequence of words alternating with words in the inverse of the first sequence of words. In addition, the second sequence of words includes substantially twice as many words as the first sequence of words.

摘要翻译： 描述用于传送字序列的编码电路的实施例。 该编码电路包括编码模块，其被配置为接收第一个单词序列，并且基于第一个单词序列生成直流平衡的第二个单词序列，其中传达第二个单词序列的消耗比传送第三个单词的能量少 单词序列包括第一个单词序列中的单词与第一个单词序列中的单词交替出现的单词。 另外，第二个词序列包括基本上是第一个词序列的两倍的单词。

公开(公告)号：US07561584B1

公开(公告)日：2009-07-14

申请号：US11270010

申请日：2005-11-09

申请人： Bernard Tourancheau ,  Henri Gouraud ,  Danny Cohen ,  Ivan Sutherland

发明人： Bernard Tourancheau ,  Henri Gouraud ,  Danny Cohen ,  Ivan Sutherland

IPC分类号： H04L12/28 ,  G06F15/173

CPC分类号： H04L49/25 ,  H04L49/10

摘要： A system, including at least one central processing unit, at least one memory unit, and a plurality of integrated circuits that form a switching fabric configured to propagate data packets between the at least one central processing unit and the at least one memory unit, wherein the switching fabric is constructed using at least two directed acyclic graph (DAG) networks.

摘要翻译： 一种系统，包括至少一个中央处理单元，至少一个存储器单元和多个集成电路，其形成配置成在所述至少一个中央处理单元和所述至少一个存储器单元之间传播数据分组的交换结构，其中 交换结构使用至少两个有向无环图（DAG）网络构建。

公开(公告)号：US08930582B2

公开(公告)日：2015-01-06

申请号：US10699412

申请日：2003-10-31

申请人： Josephus C. Ebergen ,  Danny Cohen

发明人： Josephus C. Ebergen ,  Danny Cohen

IPC分类号： G06F15/16 ,  G06F11/00 ,  H04L12/433 ,  H04L12/24

CPC分类号： H04L12/24 ,  H04L12/433 ,  H04L41/00

摘要： One embodiment of the present invention provides a system that regulates communications between a plurality of transmitters and a receiver. The system comprises a plurality of cells, wherein each cell controls communications from a transmitter in the plurality of transmitters to the receiver. A single token flows through a ring which passes through the plurality of cells, wherein the presence of the token within a cell indicates that the corresponding transmitter may communicate with the receiver.

摘要翻译： 本发明的一个实施例提供一种调节多个发射机与接收机之间的通信的系统。 该系统包括多个小区，其中每个小区控制从多个发射机中的发射机到接收机的通信。 单个令牌流过穿过多个小区的环，其中小区中的令牌的存在指示对应的发射机可以与接收机通信。

公开(公告)号：US08107245B1

公开(公告)日：2012-01-31

申请号：US11165996

申请日：2005-06-24

申请人： Ashok V. Krishnamoorthy ,  Arthur Zingher ,  Danny Cohen ,  Robert Drost

发明人： Ashok V. Krishnamoorthy ,  Arthur Zingher ,  Danny Cohen ,  Robert Drost

IPC分类号： H05K7/00

CPC分类号： H03K3/037 ,  H01L23/48 ,  H01L2225/06527 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A system that facilitates high-speed signaling between integrated circuit chips comprising a cable, wherein the cable includes a first and second active connector that facilitate communication between integrated circuit chips. The first active connector includes a capacitive receiver which receives a signal from a corresponding capacitive transmitter located on a first integrated circuit chip through capacitive coupling, and a transmitter which transmits a signal received by the capacitive receiver, through the interconnect medium within the cable, to the second active connector. The second active connector includes a receiver which receives a signal transmitted through the interconnect medium of the cable, and a capacitive transmitter which transmits the signal to a corresponding capacitive receiver located on a second integrated circuit chip through capacitive coupling. Note that the capacitive receivers are not permanently attached to the capacitive transmitters, whereby the cable can be easily remated to other integrated circuit chips.

摘要翻译： 一种促进包括电缆的集成电路芯片之间的高速信令的系统，其中电缆包括促进集成电路芯片之间的通信的第一和第二有源连接器。 第一有源连接器包括容性接收器，其通过电容耦合从位于第一集成电路芯片上的对应的电容式发射器接收信号，以及发射机，其通过电缆中的互连介质传送由电容接收器接收的信号， 第二个有源连接器。 第二有源连接器包括接收通过电缆的互连介质传输的信号的接收器，以及通过电容耦合将信号发送到位于第二集成电路芯片上的对应的电容接收器的电容式发射器。 请注意，电容式接收器不会永久性地连接到电容式发射器，由此电缆可以轻松地重新连接到其他集成电路芯片。

公开(公告)号：US07660842B2

公开(公告)日：2010-02-09

申请号：US10436577

申请日：2003-05-12

申请人： Josephus C. Ebergen ,  Ivan E. Sutherland ,  Danny Cohen

发明人： Josephus C. Ebergen ,  Ivan E. Sutherland ,  Danny Cohen

IPC分类号： G06F7/52

CPC分类号： G06F7/5375

摘要： One embodiment of the present invention provides a system that performs a carry-save division operation that divides a numerator, N, by a denominator, D, to produce an approximation of the quotient, Q=N/D. The system approximates Q by iteratively selecting an operation to perform based on higher order bits of a remainder, r, and then performing the operation, wherein the operation can include, subtracting D from r and adding a coefficient c to a quotient calculated thus far q, or adding D to r and subtracting c from q. These subtraction and addition operations maintain r and q in carry-save form, which eliminates the need for carry propagation and thereby speeds up the division operation. Furthermore, the selection logic is simpler than previous SRT division implementations, which provides another important speed up.

摘要翻译： 本发明的一个实施例提供了一种执行进位保存除法运算的系统，其将分子N除以分母D以产生商的近似值Q = N / D。 系统通过迭代地选择基于余数r的较高阶位执行的操作来逼近Q，然后执行该操作，其中该操作可以包括从r中减去D并将系数c加到迄今为止计算的商q ，或者将D加到r中并从q中减去c。 这些减法和加法运算以进位保存的形式保持r和q，这消除了对进位传播的需要，从而加快了除法运算。 此外，选择逻辑比先前的SRT分割实现更简单，这提供了另一个重要的加速。