公开(公告)号：US5712192A

公开(公告)日：1998-01-27

申请号：US233193

申请日：1994-04-26

申请人： Robert Lee Lewis ,  Robert David Sebesta ,  Daniel Martin Waits

发明人： Robert Lee Lewis ,  Robert David Sebesta ,  Daniel Martin Waits

IPC分类号： H05K1/18 ,  H01L21/48 ,  H01L21/60 ,  H01L23/12 ,  H01L23/498 ,  H01L23/538 ,  H05K1/11 ,  H05K3/34 ,  H05K3/40 ,  H05K3/46 ,  H01L21/283 ,  H01L21/58

CPC分类号： H01L21/4846 ,  H01L23/49816 ,  H01L23/5385 ,  H05K1/112 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/1403 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K2201/09472 ,  H05K2201/10734 ,  H05K3/3431 ,  H05K3/3436 ,  H05K3/4007 ,  H05K3/4644

摘要： A process for manufacturing circuitized substrate for use in an electronic package wherein the substrate, e.g., ceramic, includes more than one conductive layer, e.g., copper, thereon separated by a suitable dielectric material, e.g., polyimide. Each layer includes its own conductive location(s) which are designed for being directly electrically connected, e.g., using solder, to respective contact sites on a semiconductor chip positioned on the substrate to form part of the final package. A method for making such a package is also provided. Significantly, the resulting package does not include interconnections between the conductive layers at the desired contact locations, these locations, as mentioned, instead being directly connected to the chip.

摘要翻译： 一种制造用于电子封装的电路化衬底的方法，其中衬底例如陶瓷包括多于一个的导电层，例如铜，其上由合适的电介质材料例如聚酰亚胺分隔开。 每个层包括其自身的导电位置，其被设计用于直接电连接（例如使用焊料）到位于衬底上的半导体芯片上的相应接触位置，以形成最终封装的一部分。 还提供了制造这种包装的方法。 显着地，所得到的封装不包括在所需接触位置处的导电层之间的互连，如上所述，这些位置而不是直接连接到芯片。

公开(公告)号：US06429113B1

公开(公告)日：2002-08-06

申请号：US09518447

申请日：2000-03-03

申请人： Robert Lee Lewis ,  Robert David Sebesta ,  Daniel Martin Waits

发明人： Robert Lee Lewis ,  Robert David Sebesta ,  Daniel Martin Waits

IPC分类号： H01L2144

CPC分类号： H05K1/112 ,  H01L21/4846 ,  H01L23/49816 ,  H01L23/5385 ,  H01L2924/0002 ,  H05K3/3436 ,  H05K3/4644 ,  H05K2201/09472 ,  H05K2201/10734 ,  H01L2924/00

摘要： A method of making a circuitized substrate for use in an electronic package wherein the substrate, e.g., ceramic, includes more than one conductive layer, e.g., copper, thereon separated by a suitable dielectric material, e.g., polyimide. Each layer includes its own conductive location(s) which are designed for being directly electrically connected, e.g. using solder, to respective contact sites on a semiconductor chip to form part of the final package. Significantly, the resulting package does not include interconnections between the conductive layers at the desired contact locations; these locations, as mentioned, instead being directly connected to the chip.

摘要翻译： 制造用于电子封装的电路化衬底的方法，其中衬底例如陶瓷包括多于一个的导电层，例如铜，其上由合适的电介质材料（例如聚酰亚胺）分隔开。 每个层包括其自己的导电位置，其被设计用于直接电连接，例如， 使用焊料到半导体芯片上的相应接触部位以形成最终封装的一部分。 显着地，所得到的封装不包括在期望的接触位置处的导电层之间的互连; 这些位置，如上所述，而是直接连接到芯片。