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公开(公告)号：US11680853B2
公开(公告)日：2023-06-20
申请号：US17392859
申请日：2021-08-03
发明人： Han Chi Hsieh , Wenlu Chen , Oliver S. King
摘要： A circuit and method for timing-tolerant optical pulse energy electrical conversion receives a current pulse stream converted from an input optical pulse stream (which may be periodic or nonperiodic), converts the current pulse stream to an electrical waveform of voltage pulses and detects each voltage pulse, e.g., by its leading edge. The conversion circuit may include a divider circuit for receiving the electrical waveform, dividing the waveform into a multi-channel output of divided electrical waveforms, and sequential logic circuits for adjusting a width window of each voltage pulse according to an adjustable delay.
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公开(公告)号：US11533062B1
公开(公告)日：2022-12-20
申请号：US17361677
申请日：2021-06-29
发明人： Wenlu Chen , Oliver S. King , Han Chi Hsieh
摘要： A non-uniform sampling pADC is disclosed. The pADC may include an optical pulse source configured to generate uniform optic pulses. The pADC may include a non-uniform sampling system. The non-uniform sampling system may include an inter-pulse timing modulation sub-system configured to convert the uniform optic pulses into non-uniform optic pulses. The non-uniform sampling system may include a timing control sub-system configured to control the timing of the optical pulse source. The pADC may include an optical modulator configured to modulate the non-uniform optical pulses. The pADC may include a photodetector configured to convert the modulated non-uniform optic pulses into electronic pulses. The pADC may include a pulse capture assembly configured to capture a pulse amplitude of the electronic pulses and generate sampled radio frequency output pulses. The pADC may include a quantizer configured to quantize the sampled radio frequency output pulses and generate digital radio frequency output signals.
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公开(公告)号：US09329453B1
公开(公告)日：2016-05-03
申请号：US14817006
申请日：2015-08-03
发明人： Han Chi Hsieh
CPC分类号： H03M1/1245 , H03M1/00 , H03M1/12 , H03M1/1215
摘要： Analog front-end circuits and methods for configuring analog front-end circuits to improve accuracy of optical pulse energy digitizers are disclosed. More specifically, an analog front-end circuit in accordance with the inventive concepts disclosed herein may be configured to reduce a pulse repetition rate as early in the front-end circuit as possible. It is contemplated that reducing the repetition rate in this manner provides more process time that may be allocated for data acquisition, hold, dump, or time guard bands, all of which may help to improve the measurement accuracy of the analog front-end circuit.
摘要翻译： 公开了用于配置模拟前端电路以提高光脉冲能量数字化仪的精度的模拟前端电路和方法。 更具体地，根据本文公开的发明构思的模拟前端电路可以被配置为尽可能早地减少前端电路中的脉冲重复率。 可以设想，以这种方式减少重复率提供了可被分配用于数据采集，保持，转储或时间保护频带的更多处理时间，所有这些可能有助于提高模拟前端电路的测量精度。
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公开(公告)号：US20220299363A1
公开(公告)日：2022-09-22
申请号：US17207599
申请日：2021-03-19
发明人： Han Chi Hsieh , Wenlu Chen
摘要： An analog pulse capture circuit is disclosed. The circuit may include one or more input sources configured to receive one or more optical signals and generate one or more electrical input signals. The circuit may include one or more distributed capacitors configured to store a target charge, the one or more distributed capacitors including one or more top plates and one or more bottom plates. The circuit may include one or more amplifiers coupled to the one or more distributed capacitors, the one or more amplifiers configured to generate one or more electrical output signals. The circuit may include one or more dump switches coupled to the one or more input sources, the one or more dump switches configured to release the stored target charge of the one or more distributed capacitors.
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公开(公告)号：US10075154B1
公开(公告)日：2018-09-11
申请号：US15232798
申请日：2016-08-09
发明人： Han Chi Hsieh
IPC分类号： H03K3/00 , H03K5/15 , H03K19/0944 , H03K17/00
CPC分类号： H03K5/15066 , H03K17/007 , H03K19/0944
摘要： An analog front end circuit of an optical pulse energy digitizer includes a multiphase clock circuit, a demultiplexer configured to demultiplex a current pulse stream into demultiplexed current pulse streams, and integrate-and-dump circuits coupled with the demultiplexer. Each ingrate and dump circuit is configured to convert one of the demultiplexed current pulse streams to provide a demultiplexed voltage pulse stream. The multiphase clock circuit includes latches having outputs coupled to a combination logic circuit. The combination logic circuit is configured to provide clock signals for the integrate-and-dump circuits.
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公开(公告)号：US20230038468A1
公开(公告)日：2023-02-09
申请号：US17392859
申请日：2021-08-03
发明人： Han Chi Hsieh , Wenlu Chen , Oliver S. King
摘要： A circuit and method for timing-tolerant optical pulse energy electrical conversion receives a current pulse stream converted from an input optical pulse stream (which may be periodic or nonperiodic), converts the current pulse stream to an electrical waveform of voltage pulses and detects each voltage pulse, e.g., by its leading edge. The conversion circuit may include a divider circuit for receiving the electrical waveform, dividing the waveform into a multi-channel output of divided electrical waveforms, and sequential logic circuits for adjusting a width window of each voltage pulse according to an adjustable delay.
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公开(公告)号：US10924088B1
公开(公告)日：2021-02-16
申请号：US16275042
申请日：2019-02-13
发明人： Han Chi Hsieh
摘要： An optical pulse to voltage signal converter may include a photodetector, a front end-circuit, and a signal processor. The front-end circuit may include a tunable loading network configured to convert a stream of current pulses from the photodetector into a stream of input voltage signals, at least one tunable voltage source configured to generate at least one stream of signals with at least one select voltage, and at least one amplifier coupled to the at least one tunable voltage source. The at least one amplifier may be configured to compare the stream of input voltage signals and the at least one stream of signals with the at least one select voltage to generate at least one stream of output voltage signals with a select duty-cycle phase and duty-cycle resolution. The amplifier may be further configured to output the at least one stream of output voltage signals to the signal processor.
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公开(公告)号：US11754444B2
公开(公告)日：2023-09-12
申请号：US17207599
申请日：2021-03-19
发明人： Han Chi Hsieh , Wenlu Chen
CPC分类号： G01J1/46 , H03F3/08 , G01J2001/4238
摘要： An analog pulse capture circuit is disclosed. The circuit may include one or more input sources configured to receive one or more optical signals and generate one or more electrical input signals. The circuit may include one or more distributed capacitors configured to store a target charge, the one or more distributed capacitors including one or more top plates and one or more bottom plates. The circuit may include one or more amplifiers coupled to the one or more distributed capacitors, the one or more amplifiers configured to generate one or more electrical output signals. The circuit may include one or more dump switches coupled to the one or more input sources, the one or more dump switches configured to release the stored target charge of the one or more distributed capacitors.
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公开(公告)号：US09960781B1
公开(公告)日：2018-05-01
申请号：US15405100
申请日：2017-01-12
发明人： Wenlu Chen , Han Chi Hsieh , Raymond Zanoni
摘要： A current-mode analog-digital conversion (ADC) circuit directly samples and digitizes an input signal in the current domain; the input signal may be a current signal or a photonic signal. Input capacitors may be coupled to the current source by a series of switches and configured to store a target charge. The target charge may be compared to a reference voltage by comparators of the system to generate digital output. The current-mode ADC circuit may be adapted to flash, successive-approximation, and pipeline architectures, or embodied in a photonic receiver incorporating current-mode ADC circuits configured to sample and digitize photonic signals.
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