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公开(公告)号：US20080233699A1
公开(公告)日：2008-09-25
申请号：US12133440
申请日：2008-06-05
IPC分类号： H01L21/336
CPC分类号： H01L29/7851 , H01L29/66795
摘要： A finFET structure and a method of fabricating the finFET structure. The method includes: forming a silicon fin on a top surface of a silicon substrate; forming a gate dielectric on opposite sidewalls of the fin; forming a gate electrode over a channel region of the fin, the gate electrode in direct physical contact with the gate dielectric layer on the opposite sidewalls of the fin; forming a first source/drain in the fin on a first side of the channel region and forming a second source/drain in the fin on a second side of the channel region; removing a portion of the substrate from under at least a portion of the first and second source/drains to create a void; and filling the void with a dielectric material. The structure includes a body contact between the silicon body of the finFET and the substrate.
摘要翻译： finFET结构和finFET结构的制造方法。 该方法包括：在硅衬底的顶表面上形成硅翅片; 在翅片的相对侧壁上形成栅电介质; 在鳍片的沟道区域上形成栅电极，栅电极与翅片的相对侧壁上的栅介电层直接物理接触; 在所述通道区域的第一侧上在所述翅片中形成第一源极/漏极，并且在所述沟道区域的第二侧上在所述鳍片中形成第二源极/漏极; 从第一和第二源/排水沟的至少一部分下方去除衬底的一部分以产生空隙; 并用介电材料填充空隙。 该结构包括在finFET的硅体和衬底之间的体接触。
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公开(公告)号：US20080142891A1
公开(公告)日：2008-06-19
申请号：US12028916
申请日：2008-02-11
IPC分类号： H01L29/78
CPC分类号： H01L29/7851 , H01L29/66795
摘要： A finFET structure and a method of fabricating the finFET structure. The method includes: forming a silicon fin on a top surface of a silicon substrate; forming a gate dielectric on opposite sidewalls of the fin; forming a gate electrode over a channel region of the fin, the gate electrode in direct physical contact with the gate dielectric layer on the opposite sidewalls of the fin; forming a first source/drain in the fin on a first side of the channel region and forming a second source/drain in the fin on a second side of the channel region; removing a portion of the substrate from under at least a portion of the first and second source/drains to create a void; and filling the void with a dielectric material. The structure includes a body contact between the silicon body of the finFET and the substrate.
摘要翻译： finFET结构和finFET结构的制造方法。 该方法包括：在硅衬底的顶表面上形成硅翅片; 在翅片的相对侧壁上形成栅电介质; 在鳍片的沟道区域上形成栅电极，栅电极与翅片的相对侧壁上的栅介电层直接物理接触; 在所述通道区域的第一侧上在所述翅片中形成第一源极/漏极，并且在所述沟道区域的第二侧上在所述鳍片中形成第二源极/漏极; 从第一和第二源/排水沟的至少一部分下方去除衬底的一部分以产生空隙; 并用介电材料填充空隙。 该结构包括在finFET的硅体和衬底之间的体接触。
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公开(公告)号：US20080001187A1
公开(公告)日：2008-01-03
申请号：US11427486
申请日：2006-06-29
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L29/7851 , H01L29/66795
摘要： A finFET structure and a method of fabricating the finFET structure. The method includes: forming a silicon fin on a top surface of a silicon substrate; forming a gate dielectric on opposite sidewalls of the fin; forming a gate electrode over a channel region of the fin, the gate electrode in direct physical contact with the gate dielectric layer on the opposite sidewalls of the fin; forming a first source/drain in the fin on a first side of the channel region and forming a second source/drain in the fin on a second side of the channel region; removing a portion of the substrate from under at least a portion of the first and second source/drains to create a void; and filling the void with a dielectric material. The structure includes a body contact between the silicon body of the finFET and the substrate.
摘要翻译： finFET结构和finFET结构的制造方法。 该方法包括：在硅衬底的顶表面上形成硅翅片; 在翅片的相对侧壁上形成栅电介质; 在鳍片的沟道区域上形成栅电极，栅电极与翅片的相对侧壁上的栅介电层直接物理接触; 在所述通道区域的第一侧上在所述翅片中形成第一源极/漏极，并且在所述沟道区域的第二侧上在所述鳍片中形成第二源极/漏极; 从第一和第二源/排水沟的至少一部分下方去除衬底的一部分以产生空隙; 并用介电材料填充空隙。 该结构包括在finFET的硅体和衬底之间的体接触。
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4.发明申请STRUCTURES FOR IMPLEMENTING EMI SHIELDING FOR RIGID CARDS AND FLEXIBLE CIRCUITS 审中-公开用于实施刚性卡和灵活电路的EMI屏蔽的结构公开(公告)号：US20080236883A1
公开(公告)日：2008-10-02
申请号：US12137287
申请日：2008-06-11
IPC分类号： H05K9/00
CPC分类号： H05K1/0218 , H05K1/0224 , H05K1/0253 , H05K3/061 , H05K3/3452 , H05K2201/09354 , H05K2201/09681 , H05K2201/09736 , H05K2203/0542 , H05K2203/0571
摘要： A method and structures with an EMI shielding electrically conductive coating are provided for implementing EMI shielding for rigid cards and flexible circuits. An EMI shielding electrically conductive coating is deposited on an outer layer, for example, using a vacuum sputtering deposition, chemical vapor deposition (CVD) or physical vapor deposition (PVD) process. A solder mask is applied. Mechanically cleaning removes the sputtered copper coating in areas of the outer layer that are not protected by the solder mask.
摘要翻译： 提供了具有EMI屏蔽导电涂层的方法和结构，用于实现刚性卡和柔性电路的EMI屏蔽。 EMI屏蔽导电涂层沉积在外层上，例如使用真空溅射沉积，化学气相沉积（CVD）或物理气相沉积（PVD）工艺。 使用焊接掩模。 机械清洁将外部层的不被焊接掩模保护的区域中的溅射铜涂层除去。
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公开(公告)号：US20080232150A1
公开(公告)日：2008-09-25
申请号：US11689559
申请日：2007-03-22
IPC分类号： G11C17/00
摘要： A method and structure implementing a reprogrammable read only memory (ROM) include a pair of fuse elements having different lengths and selectively arranged to define an initial bit state. A group of a plurality of the pairs of fuse elements defines a predetermined data pattern of ones and zeros, providing initial states stored in the reprogrammable ROM. The reprogrammable ROM is reprogrammed when needed by selectively blowing a selected fuse or selected fuses to change the data pattern stored in the ROM.
摘要翻译： 实现可再编程只读存储器（ROM）的方法和结构包括具有不同长度的一对熔丝元件，并且选择性地布置以定义初始位状态。 一组多对熔丝元件定义了一个和零的预定数据模式，提供存储在可再编程ROM中的初始状态。 当需要时，通过选择性地吹送所选择的保险丝或选定的保险丝来改变存储在ROM中的数据模式，重编程ROM被重新编程。
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公开(公告)号：US20080232152A1
公开(公告)日：2008-09-25
申请号：US11872802
申请日：2007-10-16
IPC分类号： G11C17/00
摘要： A method and structure for implementing a reprogrammable read only memory (ROM), and a design structure on which the subject circuit resides are provided. A pair of fuse elements having different lengths are selectively arranged to define an initial bit state. A group of a plurality of the pairs of fuse elements defines a predetermined data pattern of ones and zeros, providing initial states stored in the reprogrammable ROM. The reprogrammable ROM is reprogrammed when needed by selectively blowing a selected fuse or selected fuses to change the data pattern stored in the ROM.
摘要翻译： 一种用于实现可再编程只读存储器（ROM）的方法和结构，以及设置有该对象电路所在的设计结构。 选择性地布置具有不同长度的一对熔丝元件以限定初始位状态。 一组多对熔丝元件定义了一个和零的预定数据模式，提供存储在可再编程ROM中的初始状态。 当需要时，通过选择性地吹送所选择的保险丝或选定的保险丝来改变存储在ROM中的数据模式，重编程ROM被重新编程。
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7.发明申请Method and Structures for Implementing EMI Shielding for Rigid Cards and Flexible Circuits 审中-公开用于实施刚性卡和柔性电路的EMI屏蔽的方法和结构公开(公告)号：US20080029298A1
公开(公告)日：2008-02-07
申请号：US11462875
申请日：2006-08-07
IPC分类号： H05K9/00
CPC分类号： H05K1/0218 , H05K1/0224 , H05K1/0253 , H05K3/061 , H05K3/3452 , H05K2201/09354 , H05K2201/09681 , H05K2201/09736 , H05K2203/0542 , H05K2203/0571
摘要： A method and structures with an EMI shielding electrically conductive coating are provided for implementing EMI shielding for rigid cards and flexible circuits. An EMI shielding electrically conductive coating is deposited on an outer layer, for example, using a vacuum sputtering deposition, chemical vapor deposition (CVD) or physical vapor deposition (PVD) process. A solder mask is applied. Mechanically cleaning removes the sputtered copper coating in areas of the outer layer that are not protected by the solder mask.
摘要翻译： 提供了具有EMI屏蔽导电涂层的方法和结构，用于实现刚性卡和柔性电路的EMI屏蔽。 EMI屏蔽导电涂层沉积在外层上，例如使用真空溅射沉积，化学气相沉积（CVD）或物理气相沉积（PVD）工艺。 使用焊接掩模。 机械清洁将外部层的不被焊接掩模保护的区域中的溅射铜涂层除去。
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