公开(公告)号：US5289410A

公开(公告)日：1994-02-22

申请号：US905666

申请日：1992-06-29

Applicant: Romney R. Katti ,  Henry L. Stadler ,  Jiin-Chuan Wu

Inventor： Romney R. Katti ,  Henry L. Stadler ,  Jiin-Chuan Wu

IPC: G11C11/14 ,  G11C11/18 ,  H01L43/06

CPC classification number: G11C11/14 ,  G11C11/18 ,  H01L43/065

Abstract: Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

Abstract translation: 在非易失性磁性随机存取存储器中进行了改进。 这种存储器包括单元阵列阵列，每个单元阵列具有霍尔效应传感器和由具有面内，单轴各向异性和面内双极残余磁化状态的材料制成的薄膜磁性元件。 通过使用GaAs / AlGaAs / InAlAs超晶格缓冲层，通过在硅衬底上使用1μm厚的分子束外延生长InAs层，使霍尔效应传感器变得更加敏感。 一个改进可以避免矩阵结构的当前分流问题。 另一个改进降低了微型磁铁所需的磁化电流。 另一个改进涉及使用GaAs技术，其中高电子迁移率GaAs MESFET提供更快的切换时间。 另一个改进涉及将本发明配置为三维随机存取存储器的方法。

公开(公告)号：US5375082A

公开(公告)日：1994-12-20

申请号：US129001

申请日：1993-09-24

Applicant: Romney R. Katti ,  Jiin-Chuan Wu ,  Henry L. Stadler

Inventor： Romney R. Katti ,  Jiin-Chuan Wu ,  Henry L. Stadler

IPC: G11C11/14 ,  G11C11/18 ,  G11C27/02 ,  G11C27/00

CPC classification number: G11C27/005 ,  G11C11/14 ,  G11C11/18 ,  G11C27/022

Abstract: This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magnetoresistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

Abstract translation: 本发明提供了一种集成的，非易失性的高速随机存取存储器。 磁性可切换的铁磁性或亚铁磁层被夹在提供磁化磁性可切换层的能力的电导体和磁阻或霍尔效应材料之间，该材料允许感测从可磁化切换层的磁化产生的磁场。 通过使用这种集成的三层形式，由导体控制的写入处理与磁层中的存储介质和由磁阻层控制的回读过程分离。 公开了一种用于实现CMOS等的存储器的电路。

公开(公告)号：US5436861A

公开(公告)日：1995-07-25

申请号：US905878

申请日：1992-06-29

Applicant: Romney R. Katti ,  Henry L. Stadler ,  Jiin-chuan Wu

Inventor： Romney R. Katti ,  Henry L. Stadler ,  Jiin-chuan Wu

IPC: G11C19/08

CPC classification number: G11C19/0866 ,  G11C19/0858

Abstract: A new read gate design for the vertical Bloch line (VBL) memory is disclosed which offers larger operating margin than the existing read gate designs. In the existing read gate designs, a current is applied to all the stripes. The stripes that contain a VBL pair are chopped, while the stripes that do not contain a VBL pair are not chopped. The information is then detected by inspecting the presence or absence of the bubble. The margin of the chopping current amplitude is very small, and sometimes non-existent. A new method of reading Vertical Bloch Line memory is also disclosed. Instead of using the wall chirality to separate the two binary states, the spatial deflection of the stripe head is used. Also disclosed herein is a compact memory which uses vertical Bloch line (VBL) memory technology for providing data storage. A three-dimensional arrangement in the form of stacks of VBL memory layers is used to achieve high volumetric storage density. High data transfer rate is achieved by operating all the layers in parallel. Using Hall effect sensing, and optical sensing via the Faraday effect to access the data from within the three-dimensional packages, an even higher data transfer rate can be achieved due to parallel operation within each layer.

Abstract translation: 公开了用于垂直布洛赫线（VBL）存储器的新的读门设计，其提供比现有读门设计更大的操作裕度。 在现有的读门设计中，电流被应用于所有条纹。 包含VBL对的条纹被切碎，而不包含VBL对的条带不被切碎。 然后通过检查气泡的存在或不存在来检测信息。 斩波电流幅度的裕度非常小，有时不存在。 还公开了一种读取Vertical Bloch Line存储器的新方法。 代替使用壁手性来分离两个二进制状态，使用条带头的空间偏转。 本文还公开了一种紧凑型存储器，其使用垂直Bloch线（VBL）存储器技术来提供数据存储。 使用VBL存储层堆叠形式的三维布置来实现高容量存储密度。 通过并行操作所有层来实现高数据传输速率。 通过使用霍尔效应感测和通过法拉第效应的光学感测来访问三维封装内的数据，由于每层内的并行操作，可以实现更高的数据传输速率。

公开(公告)号：US5329480A

公开(公告)日：1994-07-12

申请号：US993012

申请日：1992-12-18

Applicant: Jiin-Chuan Wu ,  Henry L. Stadler ,  Romney R. Katti

Inventor： Jiin-Chuan Wu ,  Henry L. Stadler ,  Romney R. Katti

IPC: G11C11/14 ,  G11C11/18

CPC classification number: G11C11/14 ,  G11C11/18

Abstract: A nonvolatile magnetic random access memory can be achieved by an array of magnet-Hall effect (M-H) elements. The storage function is realized with a rectangular thin-film ferromagnetic material having an in-plane, uniaxial anisotropy and inplane bipolar remanent magnetization states. The thin-film magnetic element is magnetized by a local applied field, whose direction is used to form either a "0" or "1" state. The element remains in the "0" or "1" state until a switching field is applied to change its state. The stored information is detcted by a Hall-effect sensor which senses the fringing field from the magnetic storage element. The circuit design for addressing each cell includes transistor switches for providing a current of selected polarity to store a binary digit through a separate conductor overlying the magnetic element of the cell. To read out a stored binary digit, transistor switches are employed to provide a current through a row of Hall-effect sensors connected in series and enabling a differential voltage amplifier connected to all Hall-effect sensors of a column in series. To avoid read-out voltage errors due to shunt currents through resistive loads of the Hall-effect sensors of other cells in the same column, at least one transistor switch is provided between every pair of adjacent cells in every row which are not turned on except in the row of the selected cell.

Abstract translation: 可以通过磁 - 霍尔效应（M-H）元件的阵列来实现非易失磁性随机存取存储器。 存储功能由具有面内，单轴各向异性和面内双极残余磁化状态的矩形薄膜铁磁材料实现。 薄膜磁性元件被局部施加的磁场磁化，其方向用于形成“0”或“1”状态。 该元素保持在“0”或“1”状态，直到应用切换字段来更改其状态。 存储的信息被霍尔效应传感器所检测，该传感器感测来自磁存储元件的边缘场。 用于寻址每个单元的电路设计包括用于提供选定极性的电流的晶体管开关，以通过覆盖电池的磁性元件的单独导体来存储二进制数字。 为了读出存储的二进制数字，采用晶体管开关来提供一系列连续串联的霍尔效应传感器的电流，并使差分电压放大器与串联的所有霍尔效应传感器相连。 为了避免由于分流电流而导致的读出电压误差，通过同一列中的其他单元的霍尔效应传感器的电阻负载，至少有一个晶体管开关被提供在每一行不被打开的每对相邻单元之间，除了 在所选单元格的行中。

公开(公告)号：US5287300A

公开(公告)日：1994-02-15

申请号：US893823

申请日：1992-06-04

Applicant: Henry L. Stadler ,  Romney R. Katti ,  Jiin-Chuan Wu

Inventor： Henry L. Stadler ,  Romney R. Katti ,  Jiin-Chuan Wu

IPC: G11C19/08

CPC classification number: G11C19/0875

Abstract: A compact memory uses magnetic bubble technology for providing data storage. A three-dimensional arrangement, in the form of stacks of magnetic bubble layers, is used to achieve high volumetric storage density. Output tracks are used within each layer to allow data to be accessed uniquely and unambiguously. Storage can be achieved using either current access or field access magnetic bubble technology. Optical sensing via the Faraday effect is used to detect data. Optical sensing facilitates the accessing of data from within the three-dimensional package and lends itself to parallel operation for supporting high data rates and vector and parallel processing.

Abstract translation: 紧凑型存储器使用磁泡技术提供数据存储。 使用以磁性层的堆叠的形式的三维布置来实现高容积存储密度。 在每个层中使用输出轨道，以允许数据被唯一和明确地访问。 存储可以使用当前访问或现场访问磁泡技术来实现。 通过法拉第效应的光学感测用于检测数据。 光学感测有助于从三维封装内访问数据，并将其自身并入操作，以支持高数据速率和向量和并行处理。

公开(公告)号：US5173873A

公开(公告)日：1992-12-22

申请号：US545019

申请日：1990-06-28

Applicant: Jiin-Chuan Wu ,  Henry L. Stadler ,  Romney R. Katti

Inventor： Jiin-Chuan Wu ,  Henry L. Stadler ,  Romney R. Katti

IPC: G11C11/16

CPC classification number: G11C11/16

Abstract: A high speed read MRAM memory element is configured from a sandwich of magnetizable, ferromagnetic films surrounding a magento-resistive film which may be ferromagnetic or not. One outer ferromagnetic film has a higher coercive force than the other and therefore remains magnetized in one sense while the other may be switched in sense by a switching magnetic field. The magneto-resistive film is therefore sensitive to the amplitude of the resultant field between the outer ferromagnetic films and may be constructed of a high resistivity, high magneto-resistive material capable of higher sensing currents. This permits higher read voltages and therefore faster read operations. Alternate embodiments with perpendicular anisotropy, and in-plane anisotropy are shown, including an embodiment which uses high permeability guides to direct the closing flux path through the magneto-resistive material. High density, high speed, radiation hard, memory matrices may be constructed from these memory elements.

Abstract translation: 高速读取MRAM存储器元件由围绕可能是铁磁性的磁阻膜的可磁化铁磁性膜的夹层构成。 一个外部铁磁膜具有比另一个更高的矫顽力，因此在一个意义上保持磁化，而另一个可以通过切换磁场切换。 因此，磁阻膜对外部铁磁膜之间的合成场的振幅敏感，并且可以由能够具有较高感测电流的高电阻率高磁阻材料构成。 这允许更高的读取电压，因此更快的读取操作。 示出了具有垂直各向异性和面内各向异性的替代实施例，包括使用高磁导率引导件将闭合磁通路径引导通过磁阻材料的实施例。 可以从这些存储元件构建高密度，高速度，辐射硬的存储矩阵。

公开(公告)号：US20140029334A1

公开(公告)日：2014-01-30

申请号：US13561478

申请日：2012-07-30

Applicant: Romney R. Katti ,  Michael A. Smith

Inventor： Romney R. Katti ,  Michael A. Smith

IPC: G11C11/16

CPC classification number: G11C11/1675 ,  G11C11/16 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1697 ,  G11C29/04

Abstract: A magnetic field sensing system includes one or more magnetoresistive random access memory (MRAM) cells, and may be configured to determine one or more of a presence, a magnitude, and a polarity of an external magnetic field incident upon an MRAM cell. In some examples, a control module of the system controls a write current source, or another device, to provide a write current through a write line associated with the MRAM cell to induce a magnetic field proximate to the MRAM cell. The magnetic field may be less than a magnetic switching threshold of the MRAM cell. After initiating the provision of the write current through the write line, the control module may determine a magnetic state of the MRAM cell, and determine a presence of an external magnetic field incident upon the MRAM cell based at least in part on the magnetic state of the MRAM cell.

Abstract translation: 磁场感测系统包括一个或多个磁阻随机存取存储器（MRAM）单元，并且可以被配置为确定入射到MRAM单元上的外部磁场的存在，大小和极性中的一个或多个。 在一些示例中，系统的控制模块控制写入电流源或另一个器件，以通过与MRAM单元相关联的写入线提供写入电流，以引导靠近MRAM单元的磁场。 磁场可能小于MRAM单元的磁切换阈值。 在开始通过写入线提供写入电流之后，控制模块可以确定MRAM单元的磁状态，并且至少部分地基于MRAM单元的磁状态来确定入射到MRAM单元上的外部磁场的存在 MRAM单元。

公开(公告)号：US20130250663A1

公开(公告)日：2013-09-26

申请号：US13429761

申请日：2012-03-26

Applicant: Romney R. Katti ,  James L. Tucker ,  Anuj Kohli

Inventor： Romney R. Katti ,  James L. Tucker ,  Anuj Kohli

IPC: G11C11/16

CPC classification number: H01L23/576 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1695 ,  H01L27/228 ,  H01L43/02 ,  H01L43/08 ,  H01L2924/0002 ,  H01L2924/16152 ,  H01L2924/00

Abstract: A system may include circuitry and a magnetoresistive random access memory (MRAM) die including at least one MRAM cell. The circuitry may be configured to detect attempted tampering with the MRAM die and generate a signal based on the detected attempted tampering. The signal may be sufficient to damage or destroy at least one layer of the at least one MRAM cell or a fuse electrically connected to a read line of the at least one MRAM cell.

Abstract translation: 系统可以包括电路和包括至少一个MRAM单元的磁阻随机存取存储器（MRAM）管芯。 电路可以被配置为检测对MRAM管芯的尝试篡改，并且基于检测到的尝试篡改产生信号。 所述信号可能足以损坏或破坏所述至少一个MRAM单元的至少一层或电连接到所述至少一个MRAM单元的读取线的保险丝。

公开(公告)号：US08427197B2

公开(公告)日：2013-04-23

申请号：US13161070

申请日：2011-06-15

Applicant: Romney R. Katti

Inventor： Romney R. Katti

IPC: H03K17/16 ,  H03K19/003

CPC classification number: H03K19/16

Abstract: This disclosure is directed to techniques for generating a reference current based on a combinational logic function that is to be performed by a magnetic logic device. A comparator circuit may compare an amplitude of a read current that flows through the magnetic logic device and the reference current to generate a logic output value that corresponds to the logic output value when combinational logic function is applied to the input values. By selecting appropriate amplitudes for the reference current the magnetic logic device may be caused to implement different combinational logic functions.

Abstract translation: 本公开涉及用于基于将由磁逻辑器件执行的组合逻辑功能来产生参考电流的技术。 比较器电路可以比较流过磁逻辑器件的读取电流的幅度和参考电流，以便当将组合逻辑功能应用于输入值时产生对应于逻辑输出值的逻辑输出值。 通过为参考电流选择适当的幅度，可以使磁逻辑器件实现不同的组合逻辑功能。

公开(公告)号：US08358149B2

公开(公告)日：2013-01-22

申请号：US12916119

申请日：2010-10-29

Applicant: Romney R. Katti

Inventor： Romney R. Katti

IPC: H03K19/173

CPC classification number: H03K19/16 ,  G11C11/161 ,  H03K19/195

Abstract: This disclosure is directed to a magnetic logic device for implementing a combinational logic function. The magnetic logic device may include a chain of at least two magnetoresistive devices electrically coupled in series comprising a first terminal located at a first end of the chain and a second terminal located at a second end of the chain. The magnetic logic device may further include a voltage source configured to apply a voltage between the first terminal and the second terminal of the chain of at least two magnetoresistive devices electrically coupled in series. The magnetic logic device may further include a logic output generator configured to generate a logic output value for a logic function based on a magnitude of a current produced at the second terminal of the chain in response to the applied voltage.

Abstract translation: 本公开涉及用于实现组合逻辑功能的磁逻辑器件。 磁逻辑器件可以包括串联电耦合的至少两个磁阻器件的链，包括位于链的第一端的第一端子和位于链的第二端的第二端子。 磁逻辑器件还可以包括电压源，其被配置为在串联电耦合的至少两个磁阻器件的链的第一端子和第二端子之间施加电压。 磁逻辑器件还可以包括逻辑输出发生器，其被配置为基于响应于所施加的电压在链的第二端产生的电流的大小来产生逻辑功能的逻辑输出值。