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1.发明申请公开(公告)号：US20180069129A1
公开(公告)日：2018-03-08
申请号：US15704063
申请日：2017-09-14
发明人： YONG SU LEE , YOON HO KHANG , DONG JO KIM , HYUN JAE NA , SANG HO PARK , SE HWAN YU , CHONG SUP CHANG , DAE HO KIM , JAE NEUNG KIM , MYOUNG GEUN CHA , SANG GAB KIM , YU-GWANG JEONG
IPC分类号： H01L29/786 , H01L27/12 , H01L29/417 , H01L29/66
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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2.发明申请公开(公告)号：US20140363921A1
公开(公告)日：2014-12-11
申请号：US14468472
申请日：2014-08-26
发明人： YONG SU LEE , YOON HO KHANG , DONGJO KIM , HYUN JAE NA , SANG HO PARK , SE HWAN YU , CHONG SUP CHANG
IPC分类号： H01L29/66 , H01L27/12 , H01L21/385 , H01L21/02 , H01L21/441
CPC分类号： H01L29/7869 , H01L21/0262 , H01L21/385 , H01L21/441 , H01L27/1214 , H01L27/1225 , H01L27/1259 , H01L27/1288 , H01L29/41733 , H01L29/66969 , H01L29/786 , H01L29/78633 , H01L29/78696
摘要： A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.
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3.发明申请公开(公告)号：US20160308063A1
公开(公告)日：2016-10-20
申请号：US15194841
申请日：2016-06-28
发明人： YONG SU LEE , YOON HO KHANG , DONG JO KIM , HYUN JAE NA , SANG HO PARK , SE HWAN YU , CHONG SUP CHANG , DAE HO KIM , JAE NEUNG KIM , MYOUNG GEUN CHA , SANG GAB KIM , YU-GWANG JEONG
IPC分类号： H01L29/786 , H01L27/12 , H01L29/417
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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4.发明申请THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME 审中-公开薄膜晶体管，包括其的薄膜晶体管阵列面板及其制造方法公开(公告)号：US20150214380A1
公开(公告)日：2015-07-30
申请号：US14678448
申请日：2015-04-03
发明人： YONG SU LEE , YOON HO KHANG , DONG JO KIM , HYUN JAE NA , SANG HO PARK , SE HWAN YU , CHONG SUP CHANG
IPC分类号： H01L29/786 , H01L29/417 , H01L27/12
CPC分类号： H01L29/7869 , H01L21/0262 , H01L21/385 , H01L21/441 , H01L27/1214 , H01L27/1225 , H01L27/1259 , H01L27/1288 , H01L29/41733 , H01L29/66969 , H01L29/786 , H01L29/78633 , H01L29/78696
摘要： A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.
摘要翻译： 提供一种薄膜晶体管，包括该薄膜晶体管的薄膜晶体管阵列面板及其制造方法，其中薄膜晶体管包括沟道区，该沟道区包括氧化物半导体，源极区和连接到沟道的漏极区 区域，并且相对于沟道区域在两侧面对，位于沟道区域上的绝缘层和位于绝缘层上的栅电极，其中栅电极的边缘边界和沟道区域的边缘边界 基本对齐。
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公开(公告)号：US20140361302A1
公开(公告)日：2014-12-11
申请号：US14466665
申请日：2014-08-22
发明人： SANG HO PARK , YOON HO KHANG , SE HWAN YU , YONG SU LEE , CHONG SUP CHANG , MYOUNG GEUN CHA , HYUN JAE NA
IPC分类号： H01L27/12 , H01L29/45 , H01L29/417 , H01L29/786
CPC分类号： H01L27/124 , H01L27/1214 , H01L29/41758 , H01L29/458 , H01L29/78642 , H01L29/78669 , H01L29/78678
摘要： A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.
摘要翻译： 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。
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