公开(公告)号：US20140363921A1

公开(公告)日：2014-12-11

申请号：US14468472

申请日：2014-08-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： YONG SU LEE ,  YOON HO KHANG ,  DONGJO KIM ,  HYUN JAE NA ,  SANG HO PARK ,  SE HWAN YU ,  CHONG SUP CHANG

IPC: H01L29/66 ,  H01L27/12 ,  H01L21/385 ,  H01L21/02 ,  H01L21/441

CPC classification number: H01L29/7869 ,  H01L21/0262 ,  H01L21/385 ,  H01L21/441 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78633 ,  H01L29/78696

Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.

公开(公告)号：US20150357478A1

公开(公告)日：2015-12-10

申请号：US14830091

申请日：2015-08-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： HYUN JAE NA ,  Yoon Ho Khang ,  Sang Ho Park ,  Dong Hwan Shim ,  Se Hwan Yu ,  Yong Su Lee ,  Myoung Geun Cha

IPC: H01L29/786 ,  H01L29/51 ,  H01L29/49

CPC classification number: H01L29/4908 ,  H01L29/518 ,  H01L29/78603 ,  H01L29/78633

Abstract: A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.

Abstract translation: 根据本发明的示例性实施例的薄膜晶体管显示面板包括基板，形成在基板上的第一绝缘层，形成在第一绝缘层上的半导体层，形成在半导体层上的第二绝缘层，以及 形成在第二绝缘层上的栅电极，其中第一绝缘层包括遮光材料，第一绝缘层的厚度大于或等于第二绝缘层的厚度。

公开(公告)号：US20180069129A1

公开(公告)日：2018-03-08

申请号：US15704063

申请日：2017-09-14

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： YONG SU LEE ,  YOON HO KHANG ,  DONG JO KIM ,  HYUN JAE NA ,  SANG HO PARK ,  SE HWAN YU ,  CHONG SUP CHANG ,  DAE HO KIM ,  JAE NEUNG KIM ,  MYOUNG GEUN CHA ,  SANG GAB KIM ,  YU-GWANG JEONG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/78633 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US20170293378A1

公开(公告)日：2017-10-12

申请号：US15463874

申请日：2017-03-20

Applicant: Samsung Display Co., Ltd.

Inventor： SOON SUNG AHN ,  HYOUNG WOOK JANG ,  HYUN JAE NA ,  MU GYEOM KIM

IPC: G06F3/044 ,  G06K9/00

CPC classification number: G06F3/044 ,  G06F2203/0338 ,  G06F2203/04112 ,  G06K9/0002

Abstract: A touch screen including a substrate that includes an active area and a non-active area adjacent to the active area, the active area including at least one fingerprint recognition area; touch sensing electrodes including first sensing electrodes arranged in the active area, and at least one second sensing electrode arranged in the fingerprint recognition area, the second sensing electrode configured for sensing a touch and recognizing a fingerprint; and a pad portion provided with a plurality of pads which are electrically connected to respective sensing electrodes, wherein the at least one second sensing electrode includes: a plurality of sub electrodes extending in a direction inclined with respect to an edge portion of the active area; and a plurality of fingerprint recognition lines connecting the sub electrodes to the pad portion, and the fingerprint recognition lines arranged in a same fingerprint recognition area extend in a same direction.

公开(公告)号：US20170344186A1

公开(公告)日：2017-11-30

申请号：US15595839

申请日：2017-05-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： HYUN JAE NA ,  GWANG BUM KO ,  HYOUNG WOOK JANG ,  YE RI JEONG ,  JEONG YUN HAN

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0418 ,  G06F3/0416 ,  G06F3/044 ,  G06F2203/04112

Abstract: A touch screen including a plurality of first sensing electrode columns having a plurality of first sensing electrodes, the plurality of first sensing electrode columns extending in one direction, and a plurality of second sensing electrode columns alternately disposed with the first sensing electrode columns, the plurality of second sensing electrode columns including a plurality of second sensing electrodes having a plurality of sub-electrodes. Sub-electrodes of one of adjacent second sensing electrodes are electrically connected to sub-electrodes of another of the adjacent second sensing electrodes. At least some of the first sensing electrodes include a first region and a second region electrically separated from the first region.

公开(公告)号：US20160308063A1

公开(公告)日：2016-10-20

申请号：US15194841

申请日：2016-06-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： YONG SU LEE ,  YOON HO KHANG ,  DONG JO KIM ,  HYUN JAE NA ,  SANG HO PARK ,  SE HWAN YU ,  CHONG SUP CHANG ,  DAE HO KIM ,  JAE NEUNG KIM ,  MYOUNG GEUN CHA ,  SANG GAB KIM ,  YU-GWANG JEONG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417

CPC classification number: H01L29/78633 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US20150214380A1

公开(公告)日：2015-07-30

申请号：US14678448

申请日：2015-04-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： YONG SU LEE ,  YOON HO KHANG ,  DONG JO KIM ,  HYUN JAE NA ,  SANG HO PARK ,  SE HWAN YU ,  CHONG SUP CHANG

IPC: H01L29/786 ,  H01L29/417 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L21/0262 ,  H01L21/385 ,  H01L21/441 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78633 ,  H01L29/78696

Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.

Abstract translation: 提供一种薄膜晶体管，包括该薄膜晶体管的薄膜晶体管阵列面板及其制造方法，其中薄膜晶体管包括沟道区，该沟道区包括氧化物半导体，源极区和连接到沟道的漏极区 区域，并且相对于沟道区域在两侧面对，位于沟道区域上的绝缘层和位于绝缘层上的栅电极，其中栅电极的边缘边界和沟道区域的边缘边界 基本对齐。

公开(公告)号：US20140361302A1

公开(公告)日：2014-12-11

申请号：US14466665

申请日：2014-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SANG HO PARK ,  YOON HO KHANG ,  SE HWAN YU ,  YONG SU LEE ,  CHONG SUP CHANG ,  MYOUNG GEUN CHA ,  HYUN JAE NA

IPC: H01L27/12 ,  H01L29/45 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L29/41758 ,  H01L29/458 ,  H01L29/78642 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

Abstract translation: 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。