公开(公告)号：US20150364407A1

公开(公告)日：2015-12-17

申请号：US14607074

申请日：2015-01-28

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Se Rang IM ,  Seung Eun Lee ,  Seung Yeop Kook ,  Myung Sam Kang

IPC: H01L23/498 ,  H01L49/02

CPC classification number: H01L28/60 ,  H01L23/49816 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: There are provided a package board and a package using the same. The package board according to an exemplary embodiment of the present disclosure includes: an insulating layer; a circuit pattern formed in the insulating layer; a capacitor formed on a whole surface of a horizontal plane in the insulating layer; and a first via penetrating through the capacitor and electrically connecting the circuit patterns each formed on upper and lower portions of the capacitor to each other.

Abstract translation: 提供了一个包装板和一个使用它的包装。 根据本公开的示例性实施例的封装板包括：绝缘层; 形成在绝缘层中的电路图案; 形成在绝缘层的水平面的整个表面上的电容器; 以及穿过电容器并且将形成在电容器的上部和下部上的电路图案彼此电连接的第一通孔。

公开(公告)号：US20160105956A1

公开(公告)日：2016-04-14

申请号：US14877291

申请日：2015-10-07

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jun Oh HWANG ,  Kwang Hee KWON ,  Seung Eun LEE ,  Young Kwan LEE ,  Yul Kyo CHUNG ,  Se Rang IM ,  Ki Jung SUNG

IPC: H05K1/02 ,  H05K3/06 ,  H05K3/46 ,  H05K3/00 ,  H05K1/11 ,  H05K1/03

CPC classification number: H05K3/205 ,  H05K1/115 ,  H05K3/108 ,  H05K2203/054

Abstract: The present invention provides a printed circuit board includes an insulating member, a first plating layer buried in a bottom region of the insulating member, a second plating layer buried in a top region of the insulating member and a plating via for electrically connecting the first plating layer and the second plating layer by being buried in any one among the top region and the bottom region of the insulating member.

Abstract translation: 本发明提供了一种印刷电路板，包括绝缘构件，埋在绝缘构件的底部区域中的第一镀层，埋在绝缘构件的顶部区域中的第二镀层，以及用于将第一镀层 层和第二镀层被埋在绝缘构件的顶部区域和底部区域中的任一个中。

公开(公告)号：US20150366059A1

公开(公告)日：2015-12-17

申请号：US14731366

申请日：2015-06-04

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Seung Eun LEE ,  Myung Sam KANG ,  Kwang Hee KWON ,  Seung Yeop KOOK ,  Se Rang IM

IPC: H05K1/11 ,  H05K3/40

CPC classification number: H05K1/111 ,  H05K3/108 ,  H05K3/4007 ,  H05K2203/054 ,  H05K2203/1461 ,  Y02P70/611 ,  Y10T29/49156

Abstract: A seed layer and a resist layer are formed on a solder resist layer, and the resist layer is patterned to form connection pads and pad plating layers. Then, the resist layer is removed, and the seed layer exposed to the outside is removed. A device may be mounted on this circuit board, and a connection terminal of the device and the connection pad of the circuit board may be connected to each other by a wire, or the like.

Abstract translation: 在阻焊层上形成种子层和抗蚀剂层，对抗蚀剂层进行图案化以形成连接焊盘和焊盘镀层。 然后，去除抗蚀剂层，并且去除暴露于外部的种子层。 设备可以安装在该电路板上，并且电路板的连接端子和电路板的连接焊盘可以通过导线等相互连接。

公开(公告)号：US20150364539A1

公开(公告)日：2015-12-17

申请号：US14585183

申请日：2014-12-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Se Rang IM ,  Seung Eun LEE ,  Seung Yeop KOOK ,  Myung Sam KANG

IPC: H01L49/02 ,  H01L23/498

CPC classification number: H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H05K1/162 ,  H05K3/4682 ,  H05K2201/10159 ,  H01L2924/00014 ,  H01L2924/00

Abstract: There are provided a package board and a package using the same. The package board according to an exemplary embodiment of the present disclosure includes: an insulating layer; a dielectric layer formed on the insulating layer; a lower electrode formed on a whole surface of an upper surface of the insulating layer; and an upper electrode formed on a whole surface of an upper surface of the dielectric layer.

Abstract translation: 提供了一个包装板和一个使用它的包装。 根据本公开的示例性实施例的封装板包括：绝缘层; 形成在所述绝缘层上的电介质层; 形成在所述绝缘层的上表面的整个表面上的下电极; 以及形成在电介质层的上表面的整个表面上的上电极。