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公开(公告)号:US20240147620A1
公开(公告)日:2024-05-02
申请号:US18135414
申请日:2023-04-17
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Jin Uk LEE , Youn Gyu HAN , Jin Oh PARK , Yong Wan JI , Yong Duk LEE , Eun Sun KIM
IPC: H05K1/11 , H01L23/00 , H01L23/498 , H05K1/18 , H05K3/46
CPC classification number: H05K1/115 , H01L23/49816 , H01L24/32 , H05K1/186 , H05K3/4697 , H01L2224/32227
Abstract: The present disclosure relates to a printed circuit board including, a first insulating layer, a first metal layer disposed on the first insulating layer, a bridge disposed on the first metal layer and including a bridge insulating layer and a bridge circuit layer, a second insulating layer disposed on the first insulating layer and covering at least a portion of the bridge, a second metal layer disposed on the second insulating layer, and a connecting via penetrating the bridge and the second insulating layer to connect the first metal layer to the second insulating layer. The connecting via is spaced apart from the bridge circuit layer.
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公开(公告)号:US20240049389A1
公开(公告)日:2024-02-08
申请号:US18104526
申请日:2023-02-01
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Jin Uk LEE , Youn Gyu HAN , Chang Hwa PARK , Yong Duk LEE
CPC classification number: H05K1/115 , H05K1/185 , H05K3/4644 , H05K3/4697 , H01L23/49827 , H05K1/0313 , H05K1/05 , H05K2201/10734
Abstract: A printed circuit board includes: a bridge including a first insulating material, a wiring pattern disposed in the first insulating layer, a metal post disposed on the first insulating material and connected to the wiring pattern, and a second insulating material disposed on the first insulating material and covering at least a portion of the metal post; a first build-up insulating material disposed around the bridge; and a first redistribution pattern disposed on the second insulating material and the first build-up insulating material and including a metal pad connected to the metal post.
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公开(公告)号:US20210175159A1
公开(公告)日:2021-06-10
申请号:US16801906
申请日:2020-02-26
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Je Sang PARK , Chang Yul OH , Sang Ho JEONG , Yong Duk LEE
IPC: H01L23/498 , H01L21/48
Abstract: A substrate having an electronic component embedded therein includes a core substrate including first and second wiring layers disposed on different levels and one or more insulating layers disposed between the first and second wiring layers, having a cavity in which a stopper layer is disposed on a bottom surface of the cavity, and including a groove disposed around the stopper layer on the bottom surface; an electronic component disposed on the stopper layer in the cavity; an insulating material covering at least a portion of each of the core substrate and the electronic component and disposed in at least a portion of each of the cavity and the groove; and a third wiring layer disposed on the insulating material. The stopper layer protrudes on the bottom surface.
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公开(公告)号:US20230215794A1
公开(公告)日:2023-07-06
申请号:US17743775
申请日:2022-05-13
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Suk Chang HONG , Yong Duk LEE , Sang Hoon KIM , Ki Gon KIM , Woo Jeong CHOI , Cheol Min SHIN
IPC: H01L23/498 , H01L21/48
CPC classification number: H01L23/49838 , H01L23/49822 , H01L21/4857 , H01L24/16
Abstract: A printed circuit board includes: a substrate layer in which a plurality of insulating layers and a plurality of wiring patterns are repeatedly layered, the substrate layer including a conductive via layer disposed in one of the plurality of insulating layers to connect wiring patterns, among the plurality of wiring patterns, disposed on upper and lower surfaces of the one insulating layer, respectively; an uppermost substrate layer including an outermost insulating layer disposed outermost within the substrate layer, and a first wiring pattern disposed in the outermost insulating layer; and a bump pad disposed on a portion of an upper surface of the first wiring pattern and having a length shorter than a length of the first wiring pattern.
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公开(公告)号:US20220190479A1
公开(公告)日:2022-06-16
申请号:US17208139
申请日:2021-03-22
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Yang Je LEE , Chang Gun OH , Hyun Kyung PARK , Je Sang PARK , Sang Ho JEONG , Yong Duk LEE
Abstract: An antenna substrate includes: a body having a first surface and a second surface opposing each other and a side surface connecting the first surface and the second surface to each other; an antenna portion disposed on the first surface of the body; and a pad portion disposed in the body, exposed to the side surface of the body, and including a plurality of pad layers connected to each other in a first direction from the second surface of the body toward the first surface of the body. At least one of the plurality of pad layers has a greater width in a second direction than in a third direction perpendicular to the second direction when viewed in the first direction.
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公开(公告)号:US20220130766A1
公开(公告)日:2022-04-28
申请号:US17569703
申请日:2022-01-06
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Dae Jung BYUN , Chang Hwa PARK , Sang Ho JEONG , Ki Ho NA , Je Sang PARK , Yong Duk LEE , Jin Won LEE
IPC: H01L23/538 , H01L23/64
Abstract: A substrate having an electronic component embedded therein includes a core structure including a first insulating body and core wiring layers and having a cavity penetrating through a portion of the first insulating body, an electronic component disposed in the cavity, an insulating material covering at least a portion of each of the core structure and the electronic component and disposed in at least a portion of the cavity, a wiring layer disposed on the insulating material, and a build-up structure disposed on the insulating material and including a second insulating body and a build-up wiring layer. A material of the first insulating body has a coefficient of thermal expansion (CTE) less than a CTE of the second insulating body, and the insulating material has a CTE less than a CTE of a material of the second insulating body.
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公开(公告)号:US20210242595A1
公开(公告)日:2021-08-05
申请号:US16891265
申请日:2020-06-03
Applicant: Samsung Electro-Mechanics Co., Ltd.
Inventor: Hak Gu KIM , Ho Kyung KANG , Seong Jong CHEON , Young Sik HUR , Jin Seon PARK , Yong Duk LEE
Abstract: A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal.
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公开(公告)号:US20220037792A1
公开(公告)日:2022-02-03
申请号:US17505743
申请日:2021-10-20
Applicant: Samsung Electro-Mechanics Co., Ltd.
Inventor: Hak Gu KIM , Ho Kyung KANG , Seong Jong CHEON , Young Sik HUR , Jin Seon PARK , Yong Duk LEE
Abstract: A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal.
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公开(公告)号:US20210242896A1
公开(公告)日:2021-08-05
申请号:US16994955
申请日:2020-08-17
Applicant: Samsung Electro-Mechanics Co., Ltd.
Inventor: Hak Gu KIM , Ho Kyung KANG , Seong Jong CHEON , Young Sik HUR , Jin Seon PARK , Yong Duk LEE
IPC: H04B1/40 , H01Q9/04 , H01Q1/22 , H01L23/66 , H01L25/065 , H01L23/538
Abstract: A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal.
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公开(公告)号:US20210242594A1
公开(公告)日:2021-08-05
申请号:US16891200
申请日:2020-06-03
Applicant: Samsung Electro-Mechanics Co., Ltd.
Inventor: Ho Kyung KANG , Seong Jong CHEON , Hak Gu KIM , Young Sik HUR , Jin Seon PARK , Yong Duk LEE
Abstract: A radio frequency module is provided. The module includes a core member, a front-end integrated circuit (FEIC), a first connection member, a second connection member disposed on an upper surface of the core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the second connection member, and configured to input or output a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, through a wiring layer, a substrate disposed on a lower surface of the first connection member; and an electrical connection structure configured to electrically connect the first connection member and the substrate. The FEIC is configured to input or output the first RF signal and a second RF signal which has a power different from a power of the first RF signal.
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