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    SEMICONDUCTOR MEMORY DEVICE
    1.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20210257369A1

    公开(公告)日：2021-08-19

    申请号：US17313570

    申请日：2021-05-06

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Beomyong Hwang ,  Min Hee Cho ,  Hei Seung Kim ,  Mirco Cantoro ,  Hyunmog Park ,  Woo Bin Song ,  Sang Woo Lee

    IPC分类号： H01L27/108 ,  G11C11/402

    摘要： A semiconductor device includes a substrate, a peripheral circuit layer, a first active pattern, a gate electrode, a first insulating layer, a conductive contact, and a second active pattern. The peripheral circuit layer is disposed on the substrate, and the peripheral circuit layer includes logic transistors and an interconnection layer that is disposed on the logic transistors. The first active pattern is disposed on the peripheral circuit layer. The gate electrode is disposed on a channel region of the first active pattern. The first insulating layer is disposed on the first active pattern and the gate electrode. The conductive contact is disposed in the first insulating layer and is electrically connected to a first source/drain region of the first active pattern, and the second active pattern is disposed on the first insulating layer. The channel region of the second active pattern vertically overlaps with the conductive contact.

    SEMICONDUCTOR DEVICE WITH CMOS INVERTER
    3.
    发明公开
    SEMICONDUCTOR DEVICE WITH CMOS INVERTER 审中-公开

    公开(公告)号：US20230178550A1

    公开(公告)日：2023-06-08

    申请号：US17937473

    申请日：2022-10-03

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Beomyong Hwang ,  Jihye Kwon ,  Jiyoung Kim

    IPC分类号： H01L27/092 ,  H01L29/417 ,  H01L29/78 ,  H01L21/8238

    CPC分类号： H01L27/092 ,  H01L29/41741 ,  H01L29/7827 ,  H01L21/823871 ,  H01L21/823885

    摘要： A semiconductor device includes a buried insulation layer pattern on a lower substrate. A first semiconductor pattern and a second semiconductor pattern pattern are disposed on on the buried insulation layer pattern. A lower conductive pattern is formed in a lower portion of a first recess between the first and second semiconductor patterns, and the lower conductive pattern may contact lower sidewalls of the first and second semiconductor patterns. A common gate structure formed on the lower conductive pattern fills a remaining portion of the first recess. The first semiconductor pattern may include a first impurity region, a first channel region, and a second impurity region sequentially stacked from an upper surface of the first semiconductor towards the lower substrate. The second semiconductor pattern includes a third impurity region, a second channel region, and a fourth impurity region.

    Semiconductor memory device
    4.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11488956B2

    公开(公告)日：2022-11-01

    申请号：US17313570

    申请日：2021-05-06

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Beomyong Hwang ,  Min Hee Cho ,  Hei Seung Kim ,  Mirco Cantoro ,  Hyunmog Park ,  Woo Bin Song ,  Sang Woo Lee

    IPC分类号： H01L27/10 ,  H01L27/108 ,  G11C11/402

    摘要： A semiconductor device includes a substrate, a peripheral circuit layer, a first active pattern, a gate electrode, a first insulating layer, a conductive contact, and a second active pattern. The peripheral circuit layer is disposed on the substrate, and the peripheral circuit layer includes logic transistors and an interconnection layer that is disposed on the logic transistors. The first active pattern is disposed on the peripheral circuit layer. The gate electrode is disposed on a channel region of the first active pattern. The first insulating layer is disposed on the first active pattern and the gate electrode. The conductive contact is disposed in the first insulating layer and is electrically connected to a first source/drain region of the first active pattern, and the second active pattern is disposed on the first insulating layer. The channel region of the second active pattern vertically overlaps with the conductive contact.

    TRANSISTOR UNIT INCLUDING SHARED GATE STRUCTURE, AND SUB-WORD LINE DRIVER AND SEMICONDUCTOR DEVICE BASED ON THE SAME TRANSISTOR UNIT
    5.
    发明公开
    TRANSISTOR UNIT INCLUDING SHARED GATE STRUCTURE, AND SUB-WORD LINE DRIVER AND SEMICONDUCTOR DEVICE BASED ON THE SAME TRANSISTOR UNIT 审中-公开

    公开(公告)号：US20240178291A1

    公开(公告)日：2024-05-30

    申请号：US18431628

    申请日：2024-02-02

    申请人： Samsung Electronics Co., Ltd.

    发明人： Byunghoon Cho ,  Inseok Baek ,  Hyeonok Jung ,  Beomyong Hwang

    IPC分类号： H01L29/423 ,  H01L29/10

    CPC分类号： H01L29/4238 ,  H01L29/1095

    摘要： A transistor with a shared gate structure includes an active area and a gate. The active area has a body extending in a first direction on a substrate, and a protrusion extending in a second direction perpendicular to the first direction from a central portion of the body in the first direction. The gate is arranged above the active area to overlap a channel area of the active area, and has an inverted pi (II) structure that, from a plan view, surrounds on three sides but does not cover a portion of the active area that includes two corner portions of the active area. The active area is divided into a first active area and a second active area by a separation area extending in the second direction and separating the body and a portion of the protrusion. The protrusion is divided into a first portion separated into two sub-portions by the separation area and a second portion, wherein the first portion is between the body and the second portion in the second direction. Opposite ends of the body in the first direction corresponding to two drain areas, the second portion of the protrusion corresponding to a common source area, and the gate constitute two transistors, wherein the two transistors share the gate.

    Transistor unit including shared gate structure, and sub-word line driver and semiconductor device based on the same transistor unit
    6.
    发明授权
    Transistor unit including shared gate structure, and sub-word line driver and semiconductor device based on the same transistor unit 有权

    公开(公告)号：US11929414B2

    公开(公告)日：2024-03-12

    申请号：US17361890

    申请日：2021-06-29

    申请人： Samsung Electronics Co., Ltd.

    发明人： Byunghoon Cho ,  Inseok Baek ,  Hyeonok Jung ,  Beomyong Hwang

    IPC分类号： H01L29/423 ,  H01L29/10

    CPC分类号： H01L29/4238 ,  H01L29/1095

    摘要： A transistor with a shared gate structure includes an active area and a gate. The active area has a body extending in a first direction on a substrate, and a protrusion extending in a second direction perpendicular to the first direction from a central portion of the body in the first direction. The gate is arranged above the active area to overlap a channel area of the active area, and has an inverted pi () structure that, from a plan view, surrounds on three sides but does not cover a portion of the active area that includes two corner portions of the active area. The active area is divided into a first active area and a second active area by a separation area extending in the second direction and separating the body and a portion of the protrusion. The protrusion is divided into a first portion separated into two sub-portions by the separation area and a second portion, wherein the first portion is between the body and the second portion in the second direction. Opposite ends of the body in the first direction corresponding to two drain areas, the second portion of the protrusion corresponding to a common source area, and the gate constitute two transistors, wherein the two transistors share the gate.

    TRANSISTOR UNIT INCLUDING SHARED GATE STRUCTURE, AND SUB-WORD LINE DRIVER AND SEMICONDUCTOR DEVICE BASED ON THE SAME TRANSISTOR UNIT
    7.
    发明申请
    TRANSISTOR UNIT INCLUDING SHARED GATE STRUCTURE, AND SUB-WORD LINE DRIVER AND SEMICONDUCTOR DEVICE BASED ON THE SAME TRANSISTOR UNIT 有权

    公开(公告)号：US20220157960A1

    公开(公告)日：2022-05-19

    申请号：US17361890

    申请日：2021-06-29

    申请人： Samsung Electronics Co., Ltd.

    发明人： Byunghoon Cho ,  Inseok Baek ,  Hyeonok Jung ,  Beomyong Hwang

    IPC分类号： H01L29/423 ,  H01L29/10

    摘要： A transistor with a shared gate structure includes an active area and a gate. The active area has a body extending in a first direction on a substrate, and a protrusion extending in a second direction perpendicular to the first direction from a central portion of the body in the first direction. The gate is arranged above the active area to overlap a channel area of the active area, and has an inverted pi () structure that, from a plan view, surrounds on three sides but does not cover a portion of the active area that includes two corner portions of the active area. The active area is divided into a first active area and a second active area by a separation area extending in the second direction and separating the body and a portion of the protrusion. The protrusion is divided into a first portion separated into two sub-portions by the separation area and a second portion, wherein the first portion is between the body and the second portion in the second direction. Opposite ends of the body in the first direction corresponding to two drain areas, the second portion of the protrusion corresponding to a common source area, and the gate constitute two transistors, wherein the two transistors share the gate.