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1.发明公开公开(公告)号：US20230362848A1
公开(公告)日：2023-11-09
申请号：US18312970
申请日：2023-05-05
发明人： Neha Sharma , Aneesh Deshmukh , Anshuman Nigam , Jinho Choi , Dongmyoung Kim , Shiva Souhith Gantha , Vikalp Mandawaria
IPC分类号： H04W56/00 , H04W72/1263 , H04W72/566
CPC分类号： H04W56/001 , H04W72/1263 , H04W72/566
摘要： In an embodiment, a method for signaling radio bearer and handling of control plane data transmission and reception for a 6G network architecture is disclosed. The method includes a flexible and simple network function for 6G providing a degree of freedom for network function placement due to cloudification and virtualization of network functions. The method further includes a network architecture for 6G where any network node communicates with any other network node being at RAN or core network function enabling a single anchor for the UE to exchange control signaling with network. The method further enables this new network architecture for 6G with design of a signaling radio bearer which is required to communicate between network and UE. The method further defined the procedure for handling of control plane message for transmission and reception between UE and network entity.
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公开(公告)号：US11217667B2
公开(公告)日：2022-01-04
申请号：US16806629
申请日：2020-03-02
发明人： Seokhoon Kim , Dongmyoung Kim , Kanghun Moon , Hyunkwan Yu , Sanggil Lee , Seunghun Lee , Sihyung Lee , Choeun Lee , Edward Namkyu Cho , Yang Xu
IPC分类号： H01L29/08 , H01L29/78 , H01L27/088 , H01L29/06
摘要： A semiconductor device includes a substrate, a fin structure on the substrate, a gate structure on the fin structure, a gate spacer on at least on side surface of the gate structure, and a source/drain structure on the fin structure, wherein a topmost portion of a bottom surface of the gate spacer is lower than a topmost portion of a top surface of the fin structure, and a topmost portion of a top surface of the source/drain structure is lower than the topmost portion of the top surface of the fin structure.
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公开(公告)号：US11735632B2
公开(公告)日：2023-08-22
申请号：US17546690
申请日：2021-12-09
发明人： Seokhoon Kim , Dongmyoung Kim , Kanghun Moon , Hyunkwan Yu , Sanggil Lee , Seunghun Lee , Sihyung Lee , Choeun Lee , Edward Namkyu Cho , Yang Xu
IPC分类号： H01L29/08 , H01L29/78 , H01L27/088 , H01L29/06
CPC分类号： H01L29/0847 , H01L27/0886 , H01L29/0653 , H01L29/0673 , H01L29/785 , H01L29/7853
摘要： A semiconductor device includes a substrate, a fin structure on the substrate, a gate structure on the fin structure, a gate spacer on at least on side surface of the gate structure, and a source/drain structure on the fin structure, wherein a topmost portion of a bottom surface of the gate spacer is lower than a topmost portion of a top surface of the fin structure, and a topmost portion of a top surface of the source/drain structure is lower than the topmost portion of the top surface of the fin structure.
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4.发明申请公开(公告)号：US20230059169A1
公开(公告)日：2023-02-23
申请号：US17718795
申请日：2022-04-12
发明人： Jinbum Kim , Dongmyoung Kim , Cheol Kim , Dongsuk Shin , Woogwan Shim , Seung Hun Lee , Soonwook Jung
IPC分类号： H01L29/10 , H01L29/08 , H01L29/66 , H01L21/8234
摘要： A semiconductor device includes: an active pattern disposed on a substrate; a source/drain pattern disposed on the active pattern; a channel pattern connected to the source/drain pattern, wherein the channel pattern includes semiconductor patterns stacked on each other and spaced apart from each other; and a gate electrode disposed on the channel pattern and extending in a first direction, wherein the gate electrode includes: a channel neighboring part adjacent to a first sidewall of a first semiconductor pattern of the stacked semiconductor patterns; and a body part spaced apart from the first semiconductor pattern, wherein the channel neighboring part is disposed between the body part and the first semiconductor pattern, wherein the first sidewall of the first semiconductor pattern has a first width, wherein the channel neighboring part has a second width less than the first width. The body part has a third width greater than the second width.
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公开(公告)号：US20230145440A1
公开(公告)日：2023-05-11
申请号：US18092690
申请日：2023-01-03
发明人： Aneesh Narendra DESHMUKH , Neha Sharma , Shiva Souhith Gantha , Anshuman Nigam , Donghyun Je , Dongmyoung Kim
IPC分类号： H04W12/033
CPC分类号： H04W12/033
摘要： An example security processing method includes receiving data packets at a packet data convergence protocol (PDCP) layer from an upper layer and parsing header information of each of the data packets to determine a length of each of the plurality of headers within the corresponding header information and whether a security header is present or absent in the corresponding data packets. The method further includes identifying corresponding header information of the data packets in which the security header is present based on the determination. The method further includes encrypting, based on the determined header lengths, only each of the plurality of headers of the identified corresponding header information in which the security header is present, and thereafter transmitting the one or more data packets to a lower layer after adding information regarding each of the encrypted headers along with their encryption length into a PDCP header.
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公开(公告)号：US12062662B2
公开(公告)日：2024-08-13
申请号：US18142210
申请日：2023-05-02
发明人： Yang Xu , Hyunkwan Yu , Namkyu Cho , Dongmyoung Kim , Kanghun Moon , Sanggil Lee , Sihyung Lee
IPC分类号： H01L27/092 , H01L29/78
CPC分类号： H01L27/0924 , H01L29/7851
摘要： A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.
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公开(公告)号：US20230275091A1
公开(公告)日：2023-08-31
申请号：US18142210
申请日：2023-05-02
发明人： Yang Xu , Hyunkwan Yu , Namkyu Cho , Dongmyoung Kim , Kanghun Moon , Sanggil Lee , Sihyung Lee
IPC分类号： H01L27/092 , H01L29/78
CPC分类号： H01L27/0924 , H01L29/7851
摘要： A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.
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公开(公告)号：US20230068364A1
公开(公告)日：2023-03-02
申请号：US17718924
申请日：2022-04-12
发明人： Kyungin Choi , Dongmyoung Kim , Haejun Yu , Ki-Hyung Ko , Jiho Yoo , Soonwook Jung
IPC分类号： H01L29/786 , H01L27/092 , H01L29/06 , H01L29/423 , H01L21/02 , H01L21/8238 , H01L29/66
摘要： A semiconductor device includes an active pattern provided on a substrate, a source/drain pattern provided on the active pattern, a channel pattern configured to be connected to the source/drain pattern, a gate electrode configured to be extended in a first direction and to cross the channel pattern, and a first spacer provided on a side surface of the gate electrode. The first spacer includes a fence portion provided on a side surface of the active pattern and below the source/drain pattern. The source/drain pattern includes a body portion and a neck portion between the body portion and the active pattern. The body portion includes a crystalline surface configured to be slantingly extended from the neck portion. The crystalline surface is configured to be spaced apart from an uppermost portion of the fence portion.
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公开(公告)号：US20220115375A1
公开(公告)日：2022-04-14
申请号：US17348962
申请日：2021-06-16
发明人： Yang Xu , Hyunkwan Yu , Namkyu Cho , Dongmyoung Kim , Kanghun Moon , Sanggil Lee , Sihyung Lee
IPC分类号： H01L27/092 , H01L29/78
摘要： A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.
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公开(公告)号：US11670638B2
公开(公告)日：2023-06-06
申请号：US17348962
申请日：2021-06-16
发明人： Yang Xu , Hyunkwan Yu , Namkyu Cho , Dongmyoung Kim , Kanghun Moon , Sanggil Lee , Sihyung Lee
IPC分类号： H01L27/092 , H01L29/78
CPC分类号： H01L27/0924 , H01L29/7851
摘要： A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.
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