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公开(公告)号：US11217667B2
公开(公告)日：2022-01-04
申请号：US16806629
申请日：2020-03-02
发明人： Seokhoon Kim , Dongmyoung Kim , Kanghun Moon , Hyunkwan Yu , Sanggil Lee , Seunghun Lee , Sihyung Lee , Choeun Lee , Edward Namkyu Cho , Yang Xu
IPC分类号： H01L29/08 , H01L29/78 , H01L27/088 , H01L29/06
摘要： A semiconductor device includes a substrate, a fin structure on the substrate, a gate structure on the fin structure, a gate spacer on at least on side surface of the gate structure, and a source/drain structure on the fin structure, wherein a topmost portion of a bottom surface of the gate spacer is lower than a topmost portion of a top surface of the fin structure, and a topmost portion of a top surface of the source/drain structure is lower than the topmost portion of the top surface of the fin structure.
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公开(公告)号：US20160027902A1
公开(公告)日：2016-01-28
申请号：US14805876
申请日：2015-07-22
发明人： Jieon Yoon , Seokhoon Kim , Gyeom Kim , Nam-Kyu Kim , JinBum Kim , Dong Chan Suh , Kwan Heum Lee , Byeongchan Lee , Choeun Lee , Sujin Jung
CPC分类号： H01L29/66795 , H01L21/26506 , H01L21/30608 , H01L21/3247 , H01L21/823425 , H01L29/045 , H01L29/0847 , H01L29/165 , H01L29/6656 , H01L29/66636 , H01L29/7848
摘要： Provided is a method of fabricating a semiconductor device. The method includes forming a gate pattern on a semiconductor substrate, injecting amorphization elements into the semiconductor substrate to form an amorphous portion at a side of the gate pattern, removing the amorphous portion to form a recess region, and forming a source/drain pattern in the recess region. When the recess region is formed, an etch rate of the amorphous portion is substantially the same in two different directions (e.g., and any other direction) of the semiconductor substrate.
摘要翻译： 提供一种制造半导体器件的方法。 该方法包括在半导体衬底上形成栅极图案，将非晶化元件注入到半导体衬底中以在栅极图案的一侧形成非晶部分，去除非晶部分以形成凹陷区域，并且形成源极/漏极图案 凹陷区域。 当形成凹陷区域时，非晶部分的蚀刻速率在半导体衬底的两个不同方向（例如，<111>和任何其它方向）上基本相同。
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公开(公告)号：US11482596B2
公开(公告)日：2022-10-25
申请号：US17207690
申请日：2021-03-21
发明人： Jinbum Kim , Seokhoon Kim , Kwanheum Lee , Choeun Lee , Sujin Jung
IPC分类号： H01L29/08 , H01L29/78 , H01L29/167 , H01L29/786 , H01L29/06 , H01L29/423
摘要： A semiconductor device includes a channel, a first source/drain structure on a first side surface of the channel, a second source/drain structure on a second side surface of the channel, a gate structure surrounding the channel, an inner spacer layer on a side surface of the gate structure, and an outer spacer layer on an outer surface of the inner spacer layer. The first source/drain structure includes a first source/drain layer on the channel and a second source/drain layer on the first source/drain layer, and on a plane of the semiconductor device that passes through the channel, at least one of a first boundary line of the first source/drain layer in contact with the second source/drain layer and a second boundary line of the first source/drain layer in contact with the channel may be convex, extending toward the channel.
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公开(公告)号：US20190181225A1
公开(公告)日：2019-06-13
申请号：US16138064
申请日：2018-09-21
发明人： Choeun Lee , Seokhoon Kim , Sanggil Lee , Seung Hun LEE , Min-Hee Choi
IPC分类号： H01L29/08 , H01L29/10 , H01L29/165 , H01L29/04 , H01L27/11 , H01L29/78 , H01L29/06 , H01L21/8238 , H01L21/308 , H01L21/02 , H01L29/66
摘要： Disclosed is a semiconductor device that comprises a substrate including a first active pattern vertically protruding from a top surface of the substrate, and a first source/drain pattern filing a first recess formed on an upper portion of the first active pattern. The first source/drain pattern comprises a first semiconductor pattern and a second semiconductor pattern on the first semiconductor pattern. The first semiconductor pattern has a first face, a second face, and a first corner edge defined when the first face and the second face meet with each other. The second semiconductor pattern covers the first face and the second face of the first semiconductor pattern and exposes the first corner edge.
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公开(公告)号：US09905676B2
公开(公告)日：2018-02-27
申请号：US15134556
申请日：2016-04-21
发明人： JinBum Kim , Kang Hun Moon , Choeun Lee , Sujin Jung , Yang Xu
IPC分类号： H01L29/66 , H01L29/78 , H01L29/08 , H01L21/8234 , H01L29/06
CPC分类号： H01L29/66795 , H01L21/823425 , H01L21/823431 , H01L29/0657 , H01L29/0688 , H01L29/0847 , H01L29/161 , H01L29/165 , H01L29/66545 , H01L29/6656 , H01L29/7848
摘要： Methods of forming an integrated circuit device are provided. The methods may include forming a gate structure on a substrate, forming a first etch mask on a sidewall of the gate structure, anisotropically etching the substrate using the gate structure and the first etch mask as an etch mask to form a preliminary recess in the substrate, forming a sacrificial layer in the preliminary recess, forming a second etch mask on the first etch mask, etching the sacrificial layer and the substrate beneath the sacrificial layer using the gate structure and the first and second etch masks as an etch mask to form a source/drain recess in the substrate, and forming a source/drain in the source/drain recess. A sidewall of the source/drain recess may be recessed toward the gate structure relative to an outer surface of the second etch mask.
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公开(公告)号：US20160322495A1
公开(公告)日：2016-11-03
申请号：US15138840
申请日：2016-04-26
发明人： Kanghun Moon , JinBum Kim , Kwan Heum Lee , Choeun Lee , Sujin Jung , Yang Xu
IPC分类号： H01L29/78 , H01L29/167 , H01L29/165 , H01L29/08 , H01L29/161
CPC分类号： H01L29/7848 , H01L29/0847 , H01L29/161 , H01L29/165 , H01L29/66545 , H01L29/66795 , H01L29/7851
摘要： A semiconductor device includes an active pattern protruding from a substrate and extending in a first direction, first and second gate electrodes intersecting the active pattern in a second direction intersecting the first direction, and a source/drain region disposed on the active pattern between the first and second gate electrodes. The source/drain region includes a first part adjacent to an uppermost surface of the active pattern and provided at a level lower than the uppermost surface of the active pattern, and a second part disposed under the first part so as to be in contact with the first part. A width of the first part along the first direction decreases in a direction away from the substrate, and a width of the second part along the first direction increases in a direction away from the substrate.
摘要翻译： 半导体器件包括从衬底突出并沿第一方向延伸的有源图案，在与第一方向相交的第二方向上与有源图案相交的第一和第二栅电极以及设置在第一和第二方向上的有源图案之间的源/漏区域 和第二栅电极。 源极/漏极区域包括与有源图案的最上表面相邻并且设置在比有源图案的最上表面低的水平面处的第一部分，以及设置在第一部分下方以与第一部分接触的第二部分 第一部分。 沿着第一方向的第一部分的宽度沿离开基板的方向减小，并且沿着第一方向的第二部分的宽度在远离基板的方向上增加。
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公开(公告)号：US11881510B2
公开(公告)日：2024-01-23
申请号：US17935561
申请日：2022-09-26
发明人： Jinbum Kim , Seokhoon Kim , Kwanheum Lee , Choeun Lee , Sujin Jung
IPC分类号： H01L29/08 , H01L29/78 , H01L29/167 , H01L29/786 , H01L29/06 , H01L29/423
CPC分类号： H01L29/0847 , H01L29/0653 , H01L29/167 , H01L29/785 , H01L29/78696 , H01L29/0673 , H01L29/42392
摘要： A semiconductor device includes a channel, a first source/drain structure on a first side surface of the channel, a second source/drain structure on a second side surface of the channel, a gate structure surrounding the channel, an inner spacer layer on a side surface of the gate structure, and an outer spacer layer on an outer surface of the inner spacer layer. The first source/drain structure includes a first source/drain layer on the channel and a second source/drain layer on the first source/drain layer, and on a plane of the semiconductor device that passes through the channel, at least one of a first boundary line of the first source/drain layer in contact with the second source/drain layer and a second boundary line of the first source/drain layer in contact with the channel may be convex, extending toward the channel.
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公开(公告)号：US11735632B2
公开(公告)日：2023-08-22
申请号：US17546690
申请日：2021-12-09
发明人： Seokhoon Kim , Dongmyoung Kim , Kanghun Moon , Hyunkwan Yu , Sanggil Lee , Seunghun Lee , Sihyung Lee , Choeun Lee , Edward Namkyu Cho , Yang Xu
IPC分类号： H01L29/08 , H01L29/78 , H01L27/088 , H01L29/06
CPC分类号： H01L29/0847 , H01L27/0886 , H01L29/0653 , H01L29/0673 , H01L29/785 , H01L29/7853
摘要： A semiconductor device includes a substrate, a fin structure on the substrate, a gate structure on the fin structure, a gate spacer on at least on side surface of the gate structure, and a source/drain structure on the fin structure, wherein a topmost portion of a bottom surface of the gate spacer is lower than a topmost portion of a top surface of the fin structure, and a topmost portion of a top surface of the source/drain structure is lower than the topmost portion of the top surface of the fin structure.
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公开(公告)号：US11302779B2
公开(公告)日：2022-04-12
申请号：US16452668
申请日：2019-06-26
发明人： Min-Hee Choi , Seokhoon Kim , Choeun Lee , Edward Namkyu Cho , Seung Hun Lee
IPC分类号： H01L27/092 , H01L29/78 , H01L21/8238 , H01L27/108 , H01L29/08 , H01L27/11 , H01L29/417
摘要： A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.
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公开(公告)号：US10079305B2
公开(公告)日：2018-09-18
申请号：US14861748
申请日：2015-09-22
发明人： Byeongchan Lee , Nam-Kyu Kim , JinBum Kim , Kwan Heum Lee , Choeun Lee , Sujin Jung
CPC分类号： H01L29/7851 , H01L29/0649 , H01L29/0688 , H01L29/0847 , H01L29/165 , H01L29/66545 , H01L29/66636 , H01L29/66795 , H01L29/7848
摘要： Provided are a semiconductor device and a method of fabricating the same. The device may include an active pattern protruding from a substrate, gate structures crossing the active pattern, and a source/drain region provided between adjacent ones of the gate structures. The source/drain region may include a source/drain epitaxial layer in a recessed region, which is formed in the active pattern between the adjacent ones of the gate structures. Further, an impurity diffusion region may be provided in the active pattern to enclose the source/drain epitaxial layer along inner surfaces of the recessed region.
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