SEMICONDUCTOR DEVICE
    6.
    发明公开

    公开(公告)号:US20230215867A1

    公开(公告)日:2023-07-06

    申请号:US17966472

    申请日:2022-10-14

    Abstract: A semiconductor device includes a substrate including a first region, a second region, and active regions extending in a first direction in the first region and in the second region; gate electrodes on the first region and the second region, the gate electrodes intersecting the active regions and extending in a second direction; a plurality of channel layers spaced apart from each other in a third direction on active regions of the active regions and encompassed by the gate electrodes, the third direction being perpendicular to an upper surface of the substrate; and first source/drain regions and second source/drain regions in portions of the active regions that are recessed on both sides of the gate electrodes, the first source/drain regions and the second source/drain regions being connected to the plurality of channel layers, wherein the first source/drain regions are in the first region, and the second source/drain regions are in the second region, wherein an end portion of each of the first source/drain regions in the second direction in a plan view includes a tip region protruding in the second direction, and wherein an end portion of each of the second source/drain regions in the second direction in the plan view extends flatly in the first direction.

    MULTI-CHANNEL FIELD EFFECT TRANSISTORS WITH ENHANCED MULTI-LAYERED SOURCE/DRAIN REGIONS

    公开(公告)号:US20230141852A1

    公开(公告)日:2023-05-11

    申请号:US17866966

    申请日:2022-07-18

    CPC classification number: H01L29/7848 H01L29/0847 H01L21/823814 H01L27/0922

    Abstract: A semiconductor device includes a semiconductor active region having a vertical stack of multiple spaced-apart semiconductor channel regions thereon. A gate electrode extends on the active region and between the spaced-apart channel regions. A source/drain region contacts the spaced-apart channel regions. The source/drain region includes a stack of at least first, second and third epitaxial layers having different electrical characteristics. The first epitaxial layer contacts the active region and each of the spaced-apart channel regions. The second epitaxial layer contacts a first portion of an upper surface of the first epitaxial layer. The third epitaxial layer contacts a second portion of the upper surface of the first epitaxial layer. Each of the first, second and third epitaxial layers includes silicon germanium (SiGe) with unequal levels of germanium (Ge) therein. A level of germanium in the third epitaxial layer exceeds a level of germanium in the second epitaxial layer, which exceeds a level of germanium in the first epitaxial layer.

    Semiconductor devices
    8.
    发明授权

    公开(公告)号:US12062662B2

    公开(公告)日:2024-08-13

    申请号:US18142210

    申请日:2023-05-02

    CPC classification number: H01L27/0924 H01L29/7851

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

    SEMICONDUCTOR DEVICES
    9.
    发明公开

    公开(公告)号:US20230275091A1

    公开(公告)日:2023-08-31

    申请号:US18142210

    申请日:2023-05-02

    CPC classification number: H01L27/0924 H01L29/7851

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

    SEMICONDUCTOR DEVICES
    10.
    发明申请

    公开(公告)号:US20220115375A1

    公开(公告)日:2022-04-14

    申请号:US17348962

    申请日:2021-06-16

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

Patent Agency Ranking