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公开(公告)号：US20170094781A1
公开(公告)日：2017-03-30
申请号：US15176778
申请日：2016-06-08
发明人： Kwang-Kyu Bang , Yusuf Cinar , Hwi-Jong Yoo
CPC分类号： H05K1/0271 , H05K1/0269 , H05K1/0296 , H05K1/115 , H05K1/117 , H05K1/181 , H05K2201/09727 , H05K2201/10159
摘要： A memory module includes a module board extending in one direction, a plurality of electronic elements mounted on the module board, and at least one stress detection pattern in a position between the electronic elements or adjacent to one or more of the electronic elements on the module board and including a plurality of strips configured to indicate a stress level generated in the position by an external force applied to the module board.
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公开(公告)号：US20230284378A1
公开(公告)日：2023-09-07
申请号：US18103175
申请日：2023-01-30
发明人： Sun-Ki YUN , Hwi-Jong Yoo , Jeonggi Yoon
CPC分类号： H05K1/0286 , H05K1/0296 , H05K1/167 , G06F3/0679 , G06F13/10 , H05K2201/10159 , H05K2201/10659 , G06F2213/0026
摘要： A storage device includes a printed circuit board including a controller site, a first memory site, a second memory site, first conductive lines connected with the controller site, second conductive lines connected with the first memory site, and third conductive lines connected with the second memory site, a controller package provided on the controller site, a first nonvolatile memory package provided on the first memory site, a second nonvolatile memory package provided on the second memory site, and at least one resistor connecting at least one conductive line of the first conductive lines with at least one conductive line of the second conductive lines.
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公开(公告)号：US10068828B2
公开(公告)日：2018-09-04
申请号：US15478252
申请日：2017-04-04
发明人： Min-Young Choi , Young-Rok Oh , Hwi-Jong Yoo , Il-Soo Kim , Joo-Young Kim , Ki-Taek Lee , Eun-Ji Yu
IPC分类号： H01L23/02 , H01L23/367 , H01L23/00 , H01L23/498 , H01L25/065
摘要： A semiconductor storage device includes a circuit substrate. The circuit substrate includes a main body and a connection tab connected to a side of the main body. The a main body includes a first chip mounting region and a second chip mounting region. A first semiconductor chip of a first type is mounted on the first chip mounting region. A second semiconductor chip of a second type is mounted on the second chip mounting region. The first type of the first semiconductor chip is different from the second type of the second semiconductor chip. The circuit substrate further includes a first thermal via in the connection tab and comprising a conductive material.
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公开(公告)号：US10593648B2
公开(公告)日：2020-03-17
申请号：US16024940
申请日：2018-07-02
发明人： Ilsoo Kim , Heeyoub Kang , Young-Rok Oh , Kitaek Lee , Hwi-Jong Yoo
IPC分类号： H01L25/065 , H01L23/36 , H01L23/373 , H01L23/544 , H01L25/10 , H05K1/18
摘要： A semiconductor module includes a substrate, a first package mounted on the substrate, second packages mounted on the substrate, a label layer provided on the substrate, and a heat transfer structure interposed between the substrate and the label layer and overlapping at least two of the second packages in a plan view of the module.
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公开(公告)号：US10529692B2
公开(公告)日：2020-01-07
申请号：US15812482
申请日：2017-11-14
发明人： Ilsoo Kim , Heeyoub Kang , Young-Rok Oh , Kitaek Lee , Hwi-Jong Yoo
IPC分类号： H01L25/065 , H01L23/36 , H01L23/373
摘要： A semiconductor module includes a substrate, a first package mounted on the substrate, second packages mounted on the substrate, a label layer provided on the substrate, and a heat transfer structure interposed between the substrate and the label layer and overlapping at least two of the second packages in a plan view of the module.
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公开(公告)号：US09888565B2
公开(公告)日：2018-02-06
申请号：US15176778
申请日：2016-06-08
发明人： Kwang-Kyu Bang , Yusuf Cinar , Hwi-Jong Yoo
CPC分类号： H05K1/0271 , H05K1/0269 , H05K1/0296 , H05K1/115 , H05K1/117 , H05K1/181 , H05K2201/09727 , H05K2201/10159
摘要： A memory module includes a module board extending in one direction, a plurality of electronic elements mounted on the module board, and at least one stress detection pattern in a position between the electronic elements or adjacent to one or more of the electronic elements on the module board and including a plurality of strips configured to indicate a stress level generated in the position by an external force applied to the module board.
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