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公开(公告)号:US11830541B2
公开(公告)日:2023-11-28
申请号:US17569679
申请日:2022-01-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Daero Kim , Kyunghoi Koo , Sujeong Kim , Juyoung Kim , Sanghune Park , Jiyeon Park , Jihun Oh , Kyoungwon Lee
IPC: G11C11/4076 , G11C11/4096 , G06F13/16 , G11C7/10 , G11C11/4093 , G11C7/14
CPC classification number: G11C11/4096 , G11C11/4076 , G06F13/1689 , G11C7/1066 , G11C7/1084 , G11C7/1093 , G11C7/14 , G11C11/4093
Abstract: A memory controller includes a first receiver configured to compare a read reference voltage with a piece of data received through a first data line and output a first piece of data; a first duty adjuster configured to adjust a duty of the first piece of data; a second receiver configured to compare the read reference voltage with a piece of data received through a second data line and output a second piece of data; a second duty adjuster configured to adjust a duty of the second piece of data; and a training circuit configured to perform a training operation on pieces of data received through a plurality of data lines, to obtain a target read reference voltage for each piece of data and correct a duty of each piece of data based on a level of the target read reference voltage for each piece of data.
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公开(公告)号:US12119049B2
公开(公告)日:2024-10-15
申请号:US18490042
申请日:2023-10-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Daero Kim , Kyunghoi Koo , Sujeong Kim , Juyoung Kim , Sanghune Park , Jiyeon Park , Jihun Oh , Kyoungwon Lee
IPC: G11C11/4076 , G11C11/4096 , G06F13/16 , G11C7/10 , G11C7/14 , G11C11/4093
CPC classification number: G11C11/4096 , G11C11/4076 , G06F13/1689 , G11C7/1066 , G11C7/1084 , G11C7/1093 , G11C7/14 , G11C11/4093
Abstract: A memory controller includes a first receiver configured to compare a read reference voltage with a piece of data received through a first data line and output a first piece of data; a first duty adjuster configured to adjust a duty of the first piece of data; a second receiver configured to compare the read reference voltage with a piece of data received through a second data line and output a second piece of data; a second duty adjuster configured to adjust a duty of the second piece of data; and a training circuit configured to perform a training operation on pieces of data received through a plurality of data lines, to obtain a target read reference voltage for each piece of data and correct a duty of each piece of data based on a level of the target read reference voltage for each piece of data.
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公开(公告)号:US12189560B2
公开(公告)日:2025-01-07
申请号:US17475705
申请日:2021-09-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Taekyung Yeo , Sangyun Hwang , Sujeong Kim , Jihun Oh , Joohee Shin
Abstract: A method of training a physical interface between a first device and a second device includes performing a first training of the physical interface by communicating with the second device by using a first candidate group of lanes from among a plurality of lanes; performing a second training of the physical interface by communicating with the second device by using a second candidate group of lanes from among the plurality of lanes, the second candidate group being different from the first candidate group; determining a lane group based on a result of the first training and a result of the second training; and setting the second device so that the determined lane group is used for the physical interface.
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公开(公告)号:US20240046982A1
公开(公告)日:2024-02-08
申请号:US18490042
申请日:2023-10-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Daero KIM , Kyunghoi Koo , Sujeong Kim , Juyoung Kim , Sanghune Park , Jiyeon Park , Jihun Oh , Kyoungwon Lee
IPC: G11C11/4096 , G11C11/4076
CPC classification number: G11C11/4096 , G11C11/4076 , G06F13/1689
Abstract: A memory controller includes a first receiver configured to compare a read reference voltage with a piece of data received through a first data line and output a first piece of data; a first duty adjuster configured to adjust a duty of the first piece of data; a second receiver configured to compare the read reference voltage with a piece of data received through a second data line and output a second piece of data; a second duty adjuster configured to adjust a duty of the second piece of data; and a training circuit configured to perform a training operation on pieces of data received through a plurality of data lines, to obtain a target read reference voltage for each piece of data and correct a duty of each piece of data based on a level of the target read reference voltage for each piece of data.
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