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    SEMICONDUCTOR MEMORY DEVICES
    4.
    发明申请
    SEMICONDUCTOR MEMORY DEVICES 有权

    公开(公告)号：US20240370335A1

    公开(公告)日：2024-11-07

    申请号：US18778475

    申请日：2024-07-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sungrae Kim ,  KIJUN LEE ,  MYUNGKYU LEE ,  YEONGGEOL SONG ,  Jinhoon Jang ,  SUNGHYE CHO ,  Isak Hwang

    IPC: G06F11/10

    Abstract: A semiconductor memory device includes a memory cell array, a link error correction code (ECC) engine and on-die ECC engine. The memory cell array includes a plurality of volatile memory cells. The link ECC engine provides a main data by performing a first ECC decoding on a first coedword including the main data and a first parity data, and generates a first error flag based on a result of the first ECC decoding. The on-die ECC engine generates a second parity data by performing a first ECC encoding on the main data, provides a target page of the memory cell array with a second codeword including the main data and the second parity data in response to the first error flag being deactivated or generates a third codeword by changing at least one of bits of the second codeword in response to the first error flag being deactivated.

    SEMICONDUCTOR MEMORY DEVICES
    5.
    发明公开
    SEMICONDUCTOR MEMORY DEVICES 审中-公开

    公开(公告)号：US20230367672A1

    公开(公告)日：2023-11-16

    申请号：US18226622

    申请日：2023-07-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sungrae Kim ,  Kijun Lee ,  Myungkyu Lee ,  Yeonggeol Song ,  Jinhoon Jang ,  Sunghye Cho ,  Isak Hwang

    IPC: G06F11/10

    CPC classification number: G06F11/1068

    Abstract: A semiconductor memory device includes a memory cell array, a link error correction code (ECC) engine and on-die ECC engine. The memory cell array includes a plurality of volatile memory cells. The link ECC engine provides a main data by performing a first ECC decoding on a first codeword including the main data and a first parity data, and generates a first error flag based on a result of the first ECC decoding. The on-die ECC engine generates a second parity data by performing a first ECC encoding on the main data, provides a target page of the memory cell array with a second codeword including the main data and the second parity data in response to the first error flag being deactivated or generates a third codeword by changing at least one of bits of the second codeword in response to the first error flag being deactivated.

    Apparatus, memory device, and method for storing multiple parameter codes for operation parameters
    7.
    发明授权
    Apparatus, memory device, and method for storing multiple parameter codes for operation parameters 有权

    公开(公告)号：US11545196B2

    公开(公告)日：2023-01-03

    申请号：US17466754

    申请日：2021-09-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Youngbin Lee ,  Kiho Kim ,  Jinhoon Jang ,  Yeonkyu Choi

    IPC: G11C7/10 ,  G11C7/14

    Abstract: Provided are an apparatus, a memory device, and a method for storing a plurality of parameter codes for an operation parameter. The memory device includes a mode register and a control logic circuit. To set a first operating condition and a second operating condition for one operation parameter, the mode register stores a first parameter code for the operation parameter and a second parameter code, which is expressed as an offset value from the first parameter code. The control logic circuit sets the first operating condition as a current operating condition of the memory device by using the first parameter code based on a first control code and sets the second operating condition as the current operating condition of the memory device by using the first parameter code and the second parameter code based on a second control code.

    Apparatus, memory device, and method for storing multiple parameter codes for operation parameters
    10.
    发明授权
    Apparatus, memory device, and method for storing multiple parameter codes for operation parameters 有权

    公开(公告)号：US11688438B2

    公开(公告)日：2023-06-27

    申请号：US18071054

    申请日：2022-11-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Youngbin Lee ,  Kiho Kim ,  Jinhoon Jang ,  Yeonkyu Choi

    IPC: G11C7/10 ,  G11C7/14

    CPC classification number: G11C7/1063 ,  G11C7/109 ,  G11C7/1045 ,  G11C7/14

    Abstract: Provided are an apparatus, a memory device, and a method for storing a plurality of parameter codes for an operation parameter. The memory device includes a mode register and a control logic circuit. To set a first operating condition and a second operating condition for one operation parameter, the mode register stores a first parameter code for the operation parameter and a second parameter code, which is expressed as an offset value from the first parameter code. The control logic circuit sets the first operating condition as a current operating condition of the memory device by using the first parameter code based on a first control code and sets the second operating condition as the current operating condition of the memory device by using the first parameter code and the second parameter code based on a second control code.

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