-
公开(公告)号:US09940991B2
公开(公告)日:2018-04-10
申请号:US15343977
申请日:2016-11-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyun-Joong Kim , Ho-young Song , Hoi-ju Chung , Ju-yun Jung , Sang-uhn Cha
IPC: G11C7/00 , G11C11/4096 , G06F3/06 , G11C7/10 , G11C11/406 , G11C29/02 , G11C29/04 , G11C29/52 , G11C29/50 , G11C29/12
CPC classification number: G11C11/4096 , G06F3/0619 , G06F3/0659 , G06F3/0673 , G11C7/1063 , G11C11/40611 , G11C11/40622 , G11C29/025 , G11C29/028 , G11C29/04 , G11C29/50016 , G11C29/52 , G11C2029/0403 , G11C2029/0409 , G11C2029/1202 , G11C2029/5002 , G11C2211/4068
Abstract: Provided are a memory device and a memory system performing request-based refresh, and an operating method of the memory device. The operating method includes: determining a weak row by counting an activated number of at least one row; requesting for refresh on the weak row based on a result of the determining; and performing target refresh on the weak row upon receiving a refresh command according to the requesting.
-
公开(公告)号:US09859022B2
公开(公告)日:2018-01-02
申请号:US14722823
申请日:2015-05-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyun-joong Kim , Soo-hyeong Kim , Sang-hoon Shin , Ju-yun Jung , Ho-young Song , Kyo-min Sohn , Hae-suk Lee , Bu-il Jung , Han-vit Jeong
CPC classification number: G11C29/52 , G06F11/1048 , G11C2029/0411
Abstract: A memory device including: an error correction code (ECC) cell array; an ECC engine configured to receive write data to be written to a memory cell array and generate internal parity bits for the write data; and an ECC select unit configured to receive the internal parity bits and external parity bits and, in response to a first level of a control signal, store the internal parity bits in the ECC cell array and, in response to a second level of the control signal store the external parity bits in the ECC cell array.
-
公开(公告)号:US10127974B2
公开(公告)日:2018-11-13
申请号:US15909220
申请日:2018-03-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyun-Joong Kim , Ho-young Song , Hoi-ju Chung , Ju-yun Jung , Sang-uhn Cha
IPC: G11C7/00 , G11C11/4096 , G06F3/06 , G11C7/10 , G11C11/406 , G11C29/02 , G11C29/04 , G11C29/52 , G11C29/50 , G11C29/12
Abstract: Provided are a memory device and a memory system performing request-based refresh, and an operating method of the memory device. The operating method includes: determining a weak row by counting an activated number of at least one row; requesting for refresh on the weak row based on a result of the determining; and performing target refresh on the weak row upon receiving a refresh command according to the requesting.
-
-