MULTI-THREAD PROCESSOR AND CONTROLLING METHOD THEREOF

    公开(公告)号:US20180088998A1

    公开(公告)日:2018-03-29

    申请号:US15669408

    申请日:2017-08-04

    Abstract: A multi-thread processor and a method of controlling a multi-thread processor are provided. The multi-thread processor includes at least one functional unit; a mode register; and a controller configured to control the mode register to store thread mode information corresponding to a task to be processed among a plurality of thread modes, wherein the plurality of thread modes are divided based on a size and a number of at least one thread that is concurrently processed in one of the at least one functional unit, allocate at least one thread included in the task to the at least one functional unit based on the thread mode information stored in the mode register and control the at least one functional unit to process the at least one thread.

    USER AUTHENTICATION METHOD AND ELECTRONIC DEVICE SUPPORTING THE SAME
    8.
    发明申请
    USER AUTHENTICATION METHOD AND ELECTRONIC DEVICE SUPPORTING THE SAME 审中-公开
    用户认证方法及其支持的电子设备

    公开(公告)号:US20160364610A1

    公开(公告)日:2016-12-15

    申请号:US15180691

    申请日:2016-06-13

    CPC classification number: G06K9/00617 G06K9/0061 G06K9/685

    Abstract: A user authentication method for an electronic device is provided. The user authentication method includes detecting a content execution event, confirming an authentication level of content related to the detected content execution event, acquiring an appearance image through a camera unit, extracting valid regions related to an iris of a user from the acquired appearance image, and performing an authentication on the user by comparing iris authentication reference information related to a confirmed authentication level with the extracted valid regions.

    Abstract translation: 提供了一种用于电子设备的用户认证方法。 用户认证方法包括检测内容执行事件,确认与检测到的内容执行事件相关的内容的认证级别,通过照相机单元获取外观图像,从所获取的外观图像中提取与用户的虹膜有关的有效区域, 并且通过将与确认的认证级别相关的虹膜认证参考信息与所提取的有效区域进行比较来对用户执行认证。

    VECTOR PROCESSOR AND CONTROL METHOD THEREFOR
    10.
    发明申请

    公开(公告)号:US20200272478A1

    公开(公告)日:2020-08-27

    申请号:US16462086

    申请日:2017-10-23

    Abstract: A vector processor is disclosed. The vector processor includes a plurality of register files provided to each of a plurality of single instruction multiple data (SIMD) lanes, storing each of a plurality of pieces of data, and respectively outputting input data to be used in a current cycle among the plurality of pieces of data, a shuffle unit for receiving a plurality of pieces of input data outputted from the plurality of register files, and performing shuffling such that the received plurality of pieces of input data respectively correspond to the plurality of SIMD lanes and outputting the same; and a command execution unit for performing a parallel operation by receiving input data outputted from the shuffle unit.

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