公开(公告)号：US20240053917A1

公开(公告)日：2024-02-15

申请号：US18492762

申请日：2023-10-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wonseb Jeong ,  Yang Seok Ki ,  Jungmin Seo ,  Beomkyu Shin ,  Sangoak Woo ,  Younggeon Yoo ,  Chanho Yoon ,  Myungjune Jung

IPC: G06F3/06 ,  G06F12/0802

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679 ,  G06F12/0802 ,  G06F2212/60

Abstract: A storage device includes a nonvolatile memory device and a storage controller. The storage controller includes a multi-protocol host interface circuit that receives a first-type request including a first logical address from an external host and transmits/receives data corresponding to the first-type request with the external host by a block unit. Additionally, the multi-protocol host interface circuit receives a second-type request including a first physical address from the external host and transmits/receives data corresponding to the second-type request with the external host by a unit smaller than the block unit. A mapping cache manager manages an address translation table cache, sends an address translation request including the first physical address to the external host, and receives a response including mapping information corresponding to the first physical address from the external host.

公开(公告)号：US10192357B2

公开(公告)日：2019-01-29

申请号：US15202608

申请日：2016-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangoak Woo

IPC: G06T17/20 ,  G06T1/20 ,  G06T1/60 ,  G06T11/40 ,  G06T15/00

Abstract: A graphic processing apparatus and a method of performing a graphics pipeline in the graphic processing apparatus are provided. The method of performing a graphics pipeline in a graphic processing apparatus includes binning to generate a bounding box bitstream corresponding to a drawcall requiring tessellation, and in response to a bounding box allocated by the bounding box bitstream being identified in a current tile to be processed, rendering the current tile by performing selective tessellation on drawcalls corresponding to the identified bounding box.

公开(公告)号：US12106420B2

公开(公告)日：2024-10-01

申请号：US17691202

申请日：2022-03-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangoak Woo ,  Jeongae Park

IPC: G06T15/04 ,  G06T1/60 ,  G06T9/00 ,  G06T15/00

CPC classification number: G06T15/04 ,  G06T1/60 ,  G06T9/00 ,  G06T15/005

Abstract: An operating method of a graphics processing unit includes: receiving a first read request for texels, detecting whether decompression data associated with each of the texels are present in a first cache, decompressing part of a first texture compression block associated with a first texel among the texels when a result of the detecting indicates decompression data for the first texel is not present in the first cache, to generate first decompression data, and generating first texture data corresponding to the first read request, based on the first decompression data and second decompression present in the first cache.

公开(公告)号：US09984491B2

公开(公告)日：2018-05-29

申请号：US15035170

申请日：2014-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangoak Woo ,  Jeongae Park ,  Minkyu Jeong ,  Minyoung Son ,  Seokyoon Jung ,  Jeongwook Kim ,  Soojung Ryu

IPC: G09G5/36 ,  G06T15/00 ,  G06T15/04 ,  G06T15/80 ,  G06F9/46

CPC classification number: G06T15/005 ,  G06F9/46 ,  G06T15/04 ,  G06T15/80

Abstract: Provided is a method of managing commands, which includes receiving a frame buffer object (FBO) change command, comparing an FBO designated by the FBO change command with a FBO currently processed by a graphics processing unit (GPU) to determine whether the two FBOs are the same as each other, and managing the FBO change command or a flush command based on a result of the comparison.

公开(公告)号：US10332231B2

公开(公告)日：2019-06-25

申请号：US15407980

申请日：2017-01-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangoak Woo ,  Jongpil Son ,  Seungcheol Baek ,  Soojung Ryu

IPC: G06T1/20 ,  G06T1/60

Abstract: A computing system includes a memory device comprising a memory array and an internal processor configured to perform a first sub pipeline of a graphics pipeline for tile-based rendering by using graphics data stored in the memory array, for offload processing of the first sub pipeline from a host processor; and the host processor configured to perform a second sub pipeline of the graphics pipeline by using a result of the first sub pipeline stored in the memory array.

公开(公告)号：US10297067B2

公开(公告)日：2019-05-21

申请号：US15028277

申请日：2014-10-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minkyu Jeong ,  Kwontaek Kwon ,  Minyoung Son ,  Jeongsoo Park ,  Sangoak Woo

IPC: G06T15/00 ,  G06T15/40 ,  G06T15/80 ,  G06T1/60 ,  G06T7/50

Abstract: Provided are methods and apparatuses for adjusting the processing sequence of draw commands for rendering images. The rendering method including determining, at a processing sequence determiner, previous draw commands that are identical to current draw commands; de-termining a processing sequence of the current draw commands based on depth information of the determined previous draw commands; and performing a Z-test on the current draw commands based on the processing sequence, and performing shading based on a result of the Z-test.

公开(公告)号：US10198851B2

公开(公告)日：2019-02-05

申请号：US15247023

申请日：2016-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wonjong Lee ,  Hoiju Chung ,  Youngsam Shin ,  Sangoak Woo ,  Seokjoong Hwang

IPC: G06T15/06 ,  G06T15/80 ,  G06T15/00

Abstract: A rendering system includes: a ray generator configured to generate a ray; a memory chip configured to store information about objects in three-dimensional (3D) space; an intersection tester embedded in the memory chip and configured to perform an intersection test between the ray and the objects by using the information about the objects and information about the ray; and a shader configured to perform pixel shading based on a result of the intersection test.

公开(公告)号：US12260116B2

公开(公告)日：2025-03-25

申请号：US18492762

申请日：2023-10-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wonseb Jeong ,  Yang Seok Ki ,  Jungmin Seo ,  Beomkyu Shin ,  Sangoak Woo ,  Younggeon Yoo ,  Chanho Yoon ,  Myungjune Jung

IPC: G06F3/06 ,  G06F12/0802

Abstract: A storage device includes a nonvolatile memory device and a storage controller. The storage controller includes a multi-protocol host interface circuit that receives a first-type request including a first logical address from an external host and transmits/receives data corresponding to the first-type request with the external host by a block unit. Additionally, the multi-protocol host interface circuit receives a second-type request including a first physical address from the external host and transmits/receives data corresponding to the second-type request with the external host by a unit smaller than the block unit. A mapping cache manager manages an address translation table cache, sends an address translation request including the first physical address to the external host, and receives a response including mapping information corresponding to the first physical address from the external host.

公开(公告)号：US11822813B2

公开(公告)日：2023-11-21

申请号：US17680773

申请日：2022-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wonseb Jeong ,  Yang Seok Ki ,  Jungmin Seo ,  Beomkyu Shin ,  Sangoak Woo ,  Younggeon Yoo ,  Chanho Yoon ,  Myungjune Jung

IPC: G06F3/06 ,  G06F12/0802

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679 ,  G06F12/0802 ,  G06F2212/60

Abstract: A storage device includes a nonvolatile memory device and a storage controller. The storage controller includes a multi-protocol host interface circuit that receives a first-type request including a first logical address from an external host and transmits/receives data corresponding to the first-type request with the external host by a block unit. Additionally, the multi-protocol host interface circuit receives a second-type request including a first physical address from the external host and transmits/receives data corresponding to the second-type request with the external host by a unit smaller than the block unit. A mapping cache manager manages an address translation table cache, sends an address translation request including the first physical address to the external host, and receives a response including mapping information corresponding to the first physical address from the external host.

公开(公告)号：US10885681B2

公开(公告)日：2021-01-05

申请号：US15260684

申请日：2016-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeongjoon Yoo ,  Sundeep Krishnadasan ,  Jaedon Lee ,  Sangoak Woo

IPC: G06T11/20 ,  G06T1/20 ,  G06T11/00

Abstract: A method of performing path stroking includes determining whether or not aliasing based on a primitive included in a path will occur using data about the path, generating a texture to be used for performing path stroking based on a result of the determining, and mapping the texture along an edge of the primitive.