-
公开(公告)号：US12189948B2
公开(公告)日：2025-01-07
申请号：US18191254
申请日：2023-03-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seongwook Park , Deok Jae Oh , Youngsam Shin , Yeongon Cho , Yongmin Tai
Abstract: A near-memory processing unit is configured to compress a page present in a normal memory space of a memory when receiving a swap-out command from a host, allocate a memory area in which the compressed page is to be stored in a compressed memory space which is a memory area previously allocated by the host, copy the compressed page into the allocated memory area, generate an entry corresponding to the compressed page, and insert the generated entry into an entry tree.
-
公开(公告)号：US10026214B2
公开(公告)日：2018-07-17
申请号：US15335723
申请日：2016-10-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsam Shin , Wonjong Lee , Seokjoong Hwang
Abstract: A ray tracing apparatus includes a traversal (TRV) core configured to traverse an acceleration structure (AS) to detect a first node and a second node, which intersect with a generated ray and have a determined same parent node, and to determine whether the ray intersects with an overlap region where a first bounding box corresponding to the first node overlaps a second bounding box corresponding to the second node; and, an intersection test (IST) determiner configured to calculate a first hit point where the ray intersects with a primitive belonging to the first node, which is a closer node to a view point of the ray among the first node and the second node, and to determine a final hit point of the ray based on a result of the determining of whether the ray intersects with respect to an overlap region, by the TRV core.
-
公开(公告)号：US10019830B2
公开(公告)日：2018-07-10
申请号：US14514642
申请日：2014-10-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsam Shin , Wonjong Lee , Jaedon Lee
Abstract: A rendering method includes determining frames. The rendering method further includes successively rendering same regions of the frames. In another general aspect, rendering device includes an inter-frame determining unit configured to determine frames. The rendering device further includes a rendering unit configured to successively render same regions of the frames.
-
公开(公告)号：US09865078B2
公开(公告)日：2018-01-09
申请号：US14939263
申请日：2015-11-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Wonjong Lee , Youngsam Shin , Seokjoong Hwang
CPC classification number: G06T15/06 , G06T15/005
Abstract: According to a method of processing an image, respective sampling rates of each tile included in a second frame is determined based on a corresponding rendering result of a first frame, and a pixel rendering process to implement rendering of pixels included in the second frame is selected by using geometric information of reference pixels of the second frame. The reference pixels of the second frame may be selected based on the respectively determined sampling rates.
-
公开(公告)号：US11895224B2
公开(公告)日：2024-02-06
申请号：US17233701
申请日：2021-04-19
Applicant: SAMSUNG ELECTRONICS CO., LTD
Inventor： Youngsam Shin , Sunmin Kwon , Dong-Hoon Yoo
CPC classification number: H04L9/0637 , G06F7/523 , G06F7/724 , H04L9/008 , H04L2209/12
Abstract: A crypto processor, a method of operating a crypto processor, and an electronic device including a crypto processor. A method of operating a crypto processor for performing a polynomial multiplication of lattice-based texts includes transferring coefficients of polynomials for the polynomial multiplication to multipliers, performing multiplications for a portion of the coefficients in parallel using the multipliers, performing an addition for a portion of results of the multiplications using an adder, and determining a result of the polynomial multiplication based on another portion of the results of the multiplications and a result of the addition.
-
Patent Agency Ranking
公开(公告)号：US11010169B2
公开(公告)日：2021-05-18
申请号：US16132784
申请日：2018-09-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsam Shin , Dong-Hoon Yoo , Young-Hwan Heo
Abstract: A processor device includes a scheduler and a performance counter. The scheduler schedules commands of a first command set and commands of a second command set for a functional unit. A performance counter counts numbers of times where events of interest respectively occur while the functional unit processes first operations directed by the first command set and second operations directed by the second command set. The commands of the first command set are repeatedly scheduled such that the numbers of times for all the events of interest are counted with regard to the first operations. The commands of the second command set are scheduled after the numbers of times for all the events of interest are counted with regard to the first operations.
-
公开(公告)号：US10019832B2
公开(公告)日：2018-07-10
申请号：US15197339
申请日：2016-06-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongsoo Park , Youngsam Shin , Sangoak Woo
IPC: G06T15/06
CPC classification number: G06T15/06
Abstract: A method of generating an acceleration structure for ray tracing, the method including, using a processor, dividing a three-dimensional (3D) space including primitives into bounding boxes, obtaining position information of where the bounding boxes overlapping each other, and generating an acceleration structure representing the position information and an inclusion relation between the bounding boxes. Also disclosed is a related method of traversing an acceleration structure.
-
8.发明授权Method and apparatus for generating acceleration structure in ray tracing system 有权用于在光线跟踪系统中产生加速度结构的方法和装置公开(公告)号：US09576389B2
公开(公告)日：2017-02-21
申请号：US14520538
申请日：2014-10-22
Applicant: Samsung Electronics Co., Ltd. , Industry-Academic Cooperation Foundation, Yonsei University
Inventor： Jaedon Lee , Jinwoo Kim , Youngsam Shin , Minwoo Lee , Wonjong Lee , Tackdon Han
IPC: G06T15/06
CPC classification number: G06T15/06
Abstract: Provided are an apparatus and method for generating an acceleration structure in a ray tracing system. The method of generating an acceleration structure includes splitting, at an acceleration structure generator, a space comprising a three-dimensional (3D) object into a plurality of sub spaces, calculating costs for traversing the plurality of sub spaces based on occlusion information of primitives in the plurality of sub spaces, selecting the plurality of sub spaces that minimize the costs for traversing, and generating an acceleration structure based on setting the selected plurality of sub spaces as nodes.
Abstract translation: 提供了一种用于在光线跟踪系统中产生加速度结构的装置和方法。 产生加速结构的方法包括：在加速度结构生成器处，将包含三维（3D）对象的空间分割成多个子空间，根据基本上的原语的遮挡信息计算穿过多个子空间的成本 所述多个子空间，选择最小化所述运行成本的所述多个子空间，以及基于将所选择的多个子空间设置为节点来生成加速结构。
-
公开(公告)号：US20160116973A1
公开(公告)日：2016-04-28
申请号：US14884033
申请日：2015-10-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Wonjong LEE , Youngsam Shin , Seokjoong Hwang
CPC classification number: G06F1/3287 , G06F1/325 , G06F1/3265 , G06F1/3296 , G06T1/20 , G06T15/005 , G06T15/06 , Y02D10/153 , Y02D10/171 , Y02D10/172 , Y02D50/20
Abstract: A hybrid rendering apparatus includes: a tile classification unit configured to classify a plurality of tiles included in a two-dimensional (2D) frame into first tiles and second tiles; a rendering unit comprising a first rendering unit configured to render the first tiles and the second tiles by using a first method and a second rendering unit configured to render the first tiles by using a second method; a tile fetcher configured to fetch one of the plurality of tiles, determine whether the fetched tile is a first tile or a second tile, and output the fetched tile to the rendering unit; and a power controller configured to control power of the second rendering unit according to a result of the determining.
Abstract translation: 混合渲染装置包括：瓦片分类单元，被配置为将包括在二维（2D）帧中的多个瓦片分类成第一瓦片和第二瓦片; 渲染单元，包括：第一渲染单元，被配置为通过使用第一方法渲染所述第一片和所述第二片;以及第二渲染单元，被配置为通过使用第二方法渲染所述第一片; 配置为获取所述多个瓦片中的一个的瓦片取出器，确定所读取的瓦片是第一瓦片还是第二瓦片，并将所获取的瓦片输出到所述渲染单元; 以及功率控制器，被配置为根据所述确定的结果来控制所述第二渲染单元的功率。
-
公开(公告)号：US12175587B2
公开(公告)日：2024-12-24
申请号：US17572755
申请日：2022-01-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsam Shin , Yeongon Cho
Abstract: An apparatus with graphics processing includes: a memory configured to store therein acceleration structure data and primitive data for performing three-dimensional (3D) rendering; and a first processor implemented in the memory and configured to receive ray information, determine a first spatial box by performing a traversal on an acceleration structure in which scene objects are spatially partitioned based on the acceleration structure data and the ray information, and determine a first intersection point for performing the 3D rendering based on the primitive data, the ray information, and the first spatial box.
-
-
-
-
-
-
-
-
-
Search Results
28
records
(took 0.018 seconds)
