WEARABLE DEVICE AND OPERATING METHOD THEREOF

    公开(公告)号:US20240415722A1

    公开(公告)日:2024-12-19

    申请号:US18815260

    申请日:2024-08-26

    Abstract: A wearable device, to be worn on a body of a user, may include a driving module configured to generate a torque, an angle sensor configured to obtain at least one angular acceleration value by sensing a motion of a joint of the user, and a processor(s) configured to control the driving module to generate the torque, receive the obtained at least one angular acceleration value from the angle sensor, determine whether a degradation of the driving module occurs at a predetermined level or higher based on the received at least one angular acceleration value, and control to provide a notification about the degradation to the user in response to the determination that the degradation occurs at the predetermined level or higher.

    ELECTRONIC DEVICE AND CONTROL METHOD THEREOF

    公开(公告)号:US20230237631A1

    公开(公告)日:2023-07-27

    申请号:US18188868

    申请日:2023-03-23

    CPC classification number: G06T5/50 G06T1/20 G06T2207/20221

    Abstract: An electronic apparatus may include: a video processor configured to output a video frame; a graphic processor configured to output a graphic frame; a mixer; and a processor which may be configured to: control the mixer to generate and output a first composite frame based on the video frame and the graphic frame, generate a second composite frame, which comprises a video area corresponding to the video frame and a graphic area corresponding to the graphic frame in a displayed image, and in which the video area and the graphic area have undergone image effect processing, based on an event of the image effect processing, and control the mixer to output the second composite frame.

    MEMORY DEVICE INCLUDING A PLURALITY OF PADS AND METHOD OF DETECTING CRACK OF PADS THEREOF

    公开(公告)号:US20240402248A1

    公开(公告)日:2024-12-05

    申请号:US18632845

    申请日:2024-04-11

    Abstract: Disclosed is a memory device. The memory device includes a memory cell array; a first pad configured to receive a command from an external device; a second pad configured to exchange data with the external device; a third pad; test logic configured to generate a test pulse signal based on a test command received through the first pad; and a crack detection structure formed below the third pad and configured to include lines connected in series from the test logic to the second pad. A crack occurring in the third pad is detected based on a delay of a delay pulse signal changed when the test pulse signal passes through the crack detection structure.

    INTEGRATED CIRCUIT DEVICES
    8.
    发明申请

    公开(公告)号:US20220076732A1

    公开(公告)日:2022-03-10

    申请号:US17245334

    申请日:2021-04-30

    Abstract: An integrated circuit device includes a sense amplifier configured to sense a voltage change of a bit line, wherein the sense amplifier includes: a sense amplifier unit connected to the bit line and a complementary bit line, configured to sense the voltage change of the bit line in response to a control signal, configured to adjust voltages of a sensing bit line and a complementary sensing bit line based on the sensed voltage change, and including a first PMOS transistor and a first NMOS transistor; and a first offset canceling unit connecting the bit line to the complementary sensing bit line in response to an offset canceling signal, and including a first offset canceling transistor arranged between the first NMOS transistor and the first PMOS transistor, wherein the first offset canceling transistor shares a common impurity region with the first NMOS transistor.

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