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公开(公告)号：US20230237631A1
公开(公告)日：2023-07-27
申请号：US18188868
申请日：2023-03-23
发明人： Taehwan KIM , Seokjae LEE , Byungkwon KANG , Jinwoo NAM
CPC分类号： G06T5/50 , G06T1/20 , G06T2207/20221
摘要： An electronic apparatus may include: a video processor configured to output a video frame; a graphic processor configured to output a graphic frame; a mixer; and a processor which may be configured to: control the mixer to generate and output a first composite frame based on the video frame and the graphic frame, generate a second composite frame, which comprises a video area corresponding to the video frame and a graphic area corresponding to the graphic frame in a displayed image, and in which the video area and the graphic area have undergone image effect processing, based on an event of the image effect processing, and control the mixer to output the second composite frame.
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公开(公告)号：US20220345598A1
公开(公告)日：2022-10-27
申请号：US17727296
申请日：2022-04-22
发明人： Jaeheung PARK , Kwangseok BYON , Hwajoong JUNG , Bongchan KIM , Taehwan KIM , Hyungjin RHO , Kihuk LEE
摘要： An electronic device including a camera module is provided. The camera module includes a lens assembly including a lens, a lens holder in which the lens assembly is fixedly disposed, a sensor carrier that includes an image sensor at least partially aligned with an optical axis of the lens and a circuit board electrically connected with the image sensor and that moves in a first axial direction perpendicular to the optical axis and a second axial direction perpendicular to the optical axis and the first axial direction, a fixed substrate adjacent to the sensor carrier and fixed in a specified position, and a connecting member that extends from the circuit board to the fixed substrate and that extends to surround at least three interconnected edges of the circuit board when viewed in a direction of the optical axis.
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公开(公告)号：US20210185267A1
公开(公告)日：2021-06-17
申请号：US17119329
申请日：2020-12-11
发明人： Taehwan KIM , Sungjin SON , Seungjin PARK , Kwangsub BYUN , Junghwan CHOI , Byungkwon KANG , Seokjae LEE
IPC分类号： H04N5/445 , H04N21/431
摘要： Provided are a display apparatus and an operation method thereof for preventing image flicker when displaying mixed images: generating a first image corresponding to video content on a first plane, generating, on a second plane, a second image, outputting a mixed image that is a mixture of the first image and the second image, generating a third image on a third plane corresponding to the mixed image, and displaying the third image based on removal of the first image from the display.
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4.发明申请VIDEO FRAME ENCODING SYSTEM, ENCODING METHOD AND VIDEO DATA TRANSCEIVER INCLUDING THE SAME 审中-公开视频帧编码系统，编码方法和包括其的视频数据收发器公开(公告)号：US20160156925A1
公开(公告)日：2016-06-02
申请号：US14938248
申请日：2015-11-11
发明人： Taehwan KIM , Sungho Roh
IPC分类号： H04N19/52 , H04N19/80 , H04N19/176 , H04N19/167 , H04N19/61 , H04N19/124
摘要： An encoding system includes a motion estimation unit configured to receive a plurality of frames and motion data corresponding to the plurality of frames, the plurality of frames including a first frame and a second frame, the first frame being a reference frame to an encoding target frame and the second frame being the encoding target frame, the motion estimation unit further configured to generate a motion vector to indicate a positional relationship between a macroblock of the first frame and a target macroblock of the second frame, a motion compensation unit configured to compensate for a motion of the target macroblock of the second frame according to the motion vector, a transform and quantization unit configured to output transformed and quantized data transforming and quantizing the motion-compensated target macroblock of the second frame and an encoder configured to encode the transformed and quantized data and output the encoded data.
摘要翻译： 编码系统包括：运动估计单元，被配置为接收与所述多个帧相对应的多个帧和运动数据，所述多个帧包括第一帧和第二帧，所述第一帧是参考帧到编码目标帧 并且所述第二帧是所述编码对象帧，所述运动估计单元还被配置为生成用于指示所述第一帧的宏块与所述第二帧的目标宏块之间的位置关系的运动矢量，运动补偿单元， 根据运动矢量的第二帧的目标宏块的运动;变换和量化单元，被配置为输出变换和量化数据，变换和量化第二帧的运动补偿目标宏块;以及编码器，被配置为编码经变换和 量化数据并输出编码数据。
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公开(公告)号：US20240304564A1
公开(公告)日：2024-09-12
申请号：US18394974
申请日：2023-12-22
发明人： Junbae KIM , Taehwan KIM , Heejung HWANG
IPC分类号： H01L23/552 , H01L25/00 , H01L25/18 , H10B80/00
CPC分类号： H01L23/552 , H01L25/18 , H01L25/50 , H10B80/00 , H01L23/3128 , H01L24/16 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/73 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/48091 , H01L2224/48227 , H01L2224/73215 , H01L2224/73265
摘要： An electronic device includes a base substrate; a first package mounted on the base substrate, the first package including a first substrate and a first semiconductor chip mounted on the first substrate; a second package mounted on the first package, the second package including a second substrate, a second semiconductor chip mounted on the second substrate, a sealing material surrounding an upper surface of the second substrate and the second semiconductor chip, and a conformal conductive coating formed on at least an upper surface of the sealing material. A conductive fixing portion is secured to a ground pad exposed at an upper surface of the base substrate. A shielding can is secured to the base substrate by the conductive fixing portion and includes a side portion extending around the first and second packages. A metal paste is formed between the shielding can and the conformal conductive coating to contact the shielding can and the conformal conductive coating.
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公开(公告)号：US20240337687A1
公开(公告)日：2024-10-10
申请号：US18531266
申请日：2023-12-06
发明人： Taehwan KIM , Hyungjung SEO , Younsik PARK
IPC分类号： G01R31/28
CPC分类号： G01R31/2884
摘要： A system for verifying an integrated circuit includes a tracing module configured to: trace a specified path based on the specified path on which a timing analysis will be performed among a plurality of signal transfer paths within the integrated circuit and a netlist of the integrated circuit at a transistor level, generate a list of nets listing names of nets in the specified path based on the netlist and information on the specified path, declare design constraints for the specified path based on the list of the nets, and generate parasitic data for the net based on the list of the nets. The system further includes an analysis module configured to perform a timing analysis for the specified path based on the design constraints and the parasitic data.
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公开(公告)号：US20240321841A1
公开(公告)日：2024-09-26
申请号：US18609255
申请日：2024-03-19
发明人： Hwanjoo PARK , Jaechoon KIM , Sunggu KANG , Taehwan KIM
IPC分类号： H01L25/10 , H01L23/00 , H01L23/31 , H01L23/373 , H01L23/498 , H01L23/538 , H01L25/065
CPC分类号： H01L25/105 , H01L23/3128 , H01L23/3736 , H01L23/49816 , H01L23/5383 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/0657 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2225/1094
摘要： The disclosure provides a semiconductor package including a first wiring structure including a first wiring, a first semiconductor chip on the first wiring structure, a molding member surrounding the first semiconductor chip, a second wiring structure on an upper surface of the molding member and including a second wiring and a heat conductive metal, a second semiconductor chip on an upper surface of the second wiring structure, a plurality of first bumps between the second wiring structure and the second semiconductor chip, an underfill layer covering the plurality of first bumps, and a first thermal interface material (TIM) on an upper surface of the heat conductive metal, the heat conductive metal not overlapping the plurality of first bumps in the vertical direction.
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8.发明公开公开(公告)号：US20240111172A1
公开(公告)日：2024-04-04
申请号：US17703289
申请日：2022-03-17
发明人： Jaeheung PARK , Hyungjin RHO , Hwajoong JUNG , Bongchan KIM , Taehwan KIM , Kwangseok BYON , Kihuk LEE
CPC分类号： G02B27/646 , G03B5/00 , H04N23/54 , G03B2205/0007 , G03B2205/0069
摘要： Disclosed is a camera module. The camera module includes a lens assembly including a lens and an image stabilization assembly including a moving member including a first substrate and an image sensor electrically connected to the first substrate, the image stabilization assembly being connected to the lens assembly wherein an optical axis is at least partially aligned with the image sensor. The image stabilization assembly is configured to move the moving member in at least one direction perpendicular to the optical axis such that the optical axis is aligned with a specified position on the image sensor.
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公开(公告)号：US20240014166A1
公开(公告)日：2024-01-11
申请号：US18218886
申请日：2023-07-06
发明人： Youngdeuk KIM , Jaechoon KIM , Taehwan KIM , Kyungsuk OH , Heejung Hwang
CPC分类号： H01L24/73 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/33 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/92 , H01L25/18 , H10B80/00 , H01L25/50 , H01L2224/05025 , H01L2224/05155 , H01L2224/05073 , H01L2224/05564 , H01L2224/05573 , H01L2224/05644 , H01L2224/05666 , H01L2224/06181 , H01L2224/05647 , H01L2224/80359 , H01L2924/0544 , H01L2924/059 , H01L2224/06505 , H01L2224/08145 , H01L2224/13111 , H01L2224/13109 , H01L2224/13113 , H01L2224/1312 , H01L2224/13147 , H01L2224/13139 , H01L2224/13118 , H01L2224/13116 , H01L2224/13144 , H01L2924/014 , H01L2224/16145 , H01L2224/17181 , H01L2224/32145 , H01L2224/32013 , H01L2224/33181 , H01L2224/73204 , H01L2224/73253 , H01L2224/80357 , H01L2224/81203 , H01L2224/83203 , H01L2224/9211 , H01L2224/92222 , H01L2224/92242 , H01L2224/80895 , H01L2224/80896 , H01L2224/9222
摘要： A semiconductor package including: a lower chip; a chip structure including stacked semiconductor chips; and an adhesive film, the semiconductor chips include first bonding chips bonded to each other by bumps and second bonding chips directly bonded to each other, the first bonding chips include: a first bonding lower chip including a first bonding upper pad; and a first bonding upper chip on the first bonding lower chip and including a first bonding lower pad, the second bonding chips include: a second bonding lower chip including a second bonding upper insulating layer and a second bonding upper pad; and a second bonding upper chip on the second bonding lower chip and including a second bonding lower insulating layer, and a second bonding lower pad, and the adhesive film surrounds side surfaces of the bumps, fills a region between the first bonding lower and upper chips, and protrudes from the region.
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公开(公告)号：US20240145360A1
公开(公告)日：2024-05-02
申请号：US18244997
申请日：2023-09-12
发明人： Hwanjoo PARK , Jaechoon KIM , Sunggu KANG , Eunho CHO , Taehwan KIM , Jonggyu LEE
IPC分类号： H01L23/498 , H01L23/00 , H01L25/10
CPC分类号： H01L23/49811 , H01L23/49838 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/105 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2225/1023 , H01L2225/1041 , H01L2924/1434
摘要： A semiconductor package includes a first redistribution wiring layer having first redistribution wirings, a first semiconductor chip on the first redistribution wiring layer and having a first thickness from the first redistribution wiring layer, a second semiconductor chip disposed on the first redistribution wiring layer spaced apart from the first semiconductor chip and having a second thickness from the first redistribution wiring layer smaller than the first thickness, a sealing member covering the first semiconductor chip and the second semiconductor chip on the first redistribution wiring layer, a plurality of conductive vias provided in the sealing member and electrically connected to the first redistribution wirings, a second redistribution wiring layer disposed on the sealing member and having second redistribution wirings electrically connected to the conductive vias, and at least one third semiconductor chip disposed on the second redistribution wiring layer and electrically connected to the second redistribution wirings.
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