公开(公告)号：US11688813B2

公开(公告)日：2023-06-27

申请号：US17584545

申请日：2022-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Mo Kang ,  Moon Seung Yang ,  Jongryeol Yoo ,  Sihyung Lee ,  Sunguk Jang ,  Eunhye Choi

IPC: H01L29/786 ,  H01L29/08 ,  H01L29/423 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/311 ,  H01L21/02 ,  H01L21/324

CPC classification number: H01L29/78696 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/02664 ,  H01L21/311 ,  H01L21/3247 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L27/0886 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66575 ,  H01L29/785 ,  H01L29/7848

Abstract: A semiconductor device includes a channel pattern including first and second semiconductor patterns stacked on a substrate, a gate electrode covering top and lateral surfaces of the channel pattern and extending in a first direction, and including a first gate segment between the first semiconductor pattern and the second semiconductor pattern, a gate spacer covering a lateral surface of the gate electrode and including an opening exposing the channel pattern, and a first source/drain pattern on a side of the gate spacer and in contact with the channel pattern through the opening, the first source/drain pattern including a sidewall center thickness at a height of the first gate segment and at a center of the opening, and a sidewall edge thickness at the height of the first gate segment and at an edge of the opening, the sidewall edge thickness being about 0.7 to 1 times the sidewall center thickness.

公开(公告)号：US11251313B2

公开(公告)日：2022-02-15

申请号：US16774653

申请日：2020-01-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Mo Kang ,  Moon Seung Yang ,  Jongryeol Yoo ,  Sihyung Lee ,  Sunguk Jang ,  Eunhye Choi

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/08 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/311

Abstract: A semiconductor device includes a channel pattern including first and second semiconductor patterns stacked on a substrate, a gate electrode covering top and lateral surfaces of the channel pattern and extending in a first direction, and including a first gate segment between the first semiconductor pattern and the second semiconductor pattern, a gate spacer covering a lateral surface of the gate electrode and including an opening exposing the channel pattern, and a first source/drain pattern on a side of the gate spacer and in contact with the channel pattern through the opening, the first source/drain pattern including a sidewall center thickness at a height of the first gate segment and at a center of the opening, and a sidewall edge thickness at the height of the first gate segment and at an edge of the opening, the sidewall edge thickness being about 0.7 to 1 times the sidewall center thickness.

公开(公告)号：US11211457B2

公开(公告)日：2021-12-28

申请号：US16899819

申请日：2020-06-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eunhye Choi ,  Seung Mo Kang ,  Jungtaek Kim ,  Moon Seung Yang ,  Jongryeol Yoo

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device including an insulating layer on a substrate; channel semiconductor patterns stacked on the insulating layer and vertically spaced apart from each other; a gate electrode crossing the channel semiconductor patterns; source/drain regions respectively at both sides of the gate electrode and connected to each other through the channel semiconductor patterns, the source/drain regions having concave bottom surfaces; and air gaps between the insulating layer and the bottom surfaces of the source/drain regions.

公开(公告)号：US11710772B2

公开(公告)日：2023-07-25

申请号：US17560865

申请日：2021-12-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eunhye Choi ,  Seung Mo Kang ,  Jungtaek Kim ,  Moon Seung Yang ,  Jongryeol Yoo

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/105 ,  H01L29/0852 ,  H01L29/1079 ,  H01L29/42356 ,  H01L29/66712 ,  H01L29/7802

Abstract: A semiconductor device including an insulating layer on a substrate; channel semiconductor patterns stacked on the insulating layer and vertically spaced apart from each other; a gate electrode crossing the channel semiconductor patterns; source/drain regions respectively at both sides of the gate electrode and connected to each other through the channel semiconductor patterns, the source/drain regions having concave bottom surfaces; and air gaps between the insulating layer and the bottom surfaces of the source/drain regions.

公开(公告)号：US11133421B2

公开(公告)日：2021-09-28

申请号：US16808857

申请日：2020-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Moon Seung Yang ,  Eun Hye Choi ,  Seung Mo Kang ,  Yong Seung Kim ,  Jung Taek Kim ,  Min-Hee Choi

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/66 ,  H01L21/02 ,  H01L29/423

Abstract: A semiconductor device includes a fin-type pattern on a substrate, the fin-type pattern extending in a first direction and protruding from the substrate in a third direction, a first wire pattern on the fin-type pattern, the first wire pattern being spaced apart from the fin-type pattern in the third direction, and a gate electrode extending in a second direction, which is perpendicular to the first and third directions, and surrounding the first wire pattern, the gate electrode including a first portion that overlaps with the fin-type pattern in the second direction and a second portion corresponding to a remainder of the gate electrode except for the first portion.

公开(公告)号：US11569389B2

公开(公告)日：2023-01-31

申请号：US17470341

申请日：2021-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Moon Seung Yang ,  Eun Hye Choi ,  Seung Mo Kang ,  Yong Seung Kim ,  Jung Taek Kim ,  Min-Hee Choi

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/423

Abstract: A semiconductor device includes a fin-type pattern on a substrate, the fin-type pattern extending in a first direction and protruding from the substrate in a third direction, a first wire pattern on the fin-type pattern, the first wire pattern being spaced apart from the fin-type pattern in the third direction, and a gate electrode extending in a second direction, which is perpendicular to the first and third directions, and surrounding the first wire pattern, the gate electrode including a first portion that overlaps with the fin-type pattern in the second direction and a second portion corresponding to a remainder of the gate electrode except for the first portion.

公开(公告)号：US10206490B2

公开(公告)日：2019-02-19

申请号：US15206392

申请日：2016-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Mo Kang ,  Tae Seuk Kang ,  Cheol Hee Kim ,  Joon Young Jo ,  Jong Sun Baek ,  Heon Yeap Baek ,  Min Woo Yoo

IPC: B65D85/00 ,  A45F5/00 ,  A45C11/00 ,  A45C13/00 ,  H04M1/18

Abstract: An accessory device comprising: a first cover arranged to be opened and closed when the first cover is mounted on an electronic device, the first cover comprising a first plate, at least one first side wall protruding from the first plate in a first direction, and a first film disposed in a space defined by the sidewall and the plate, wherein the first film and the first side wall are at least partially transparent, and wherein the first film comprises a first layer disposed on the first plate, the first layer being at least partially reflective, a second layer disposed on the first layer, the second layer being at least partially formed of a polymeric material, and a third layer that is disposed on the second layer, the third layer being an anti-wear layer.