公开(公告)号：US09443862B1

公开(公告)日：2016-09-13

申请号：US14808463

申请日：2015-07-24

申请人： SanDisk Technologies, Inc.

发明人： Dai Iwata ,  Yusuke Yoshida ,  Kazutaka Yoshizawa

IPC分类号： H01L29/02 ,  H01L27/115 ,  H01L21/28 ,  H01L29/788 ,  H01L29/66 ,  H01L29/423

CPC分类号： H01L27/11524 ,  H01L21/28273

摘要： A NAND flash memory includes a select transistor having a first region formed of a stack of layers on the substrate surface, and a second region that includes an opening through an interpoly dielectric layer, floating gate layer, and tunnel dielectric layer, the opening separated from the substrate surface by a select gate dielectric on the substrate surface, the opening filled by a control gate layer.

摘要翻译： NAND闪速存储器包括选择晶体管，其具有在衬底表面上由堆叠层形成的第一区域，以及包括通过多晶硅间介电层的开口的第二区域，浮动栅极层和隧道电介质层，所述开口与 基板表面由基板表面上的选择栅极电介质，开口由控制栅极层填充。

公开(公告)号：US09595535B1

公开(公告)日：2017-03-14

申请号：US15046780

申请日：2016-02-18

申请人： SANDISK TECHNOLOGIES INC.

发明人： Hiroyuki Ogawa ,  Makoto Yoshida ,  Kazutaka Yoshizawa ,  Takuya Ariki ,  Toru Miwa

IPC分类号： H01L27/115 ,  H01L29/792

CPC分类号： H01L27/11582 ,  G11C8/08 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575

摘要： Word line switches in a word line decoder circuitry for a three-dimensional memory device can be formed as vertical field effect transistors overlying contact via structures to the electrically conductive layers for word lines. Via cavities in a dielectric material portion overlying stepped surfaces of the electrically conductive layers can be filled with a conductive material and recessed to form contact via structures. After forming lower active regions in the recesses, gate electrodes can be formed and patterned to form openings in areas overlying the contact via structures. Gate dielectrics can be formed on the sidewalls of the openings, and transistor channels can be formed inside the openings of the gate electrodes. Upper active regions can be formed over the transistor channels.

摘要翻译： 用于三维存储器件的字线解码器电路中的字线切换可以被形成为覆盖接触通孔结构的直线场效应晶体管至用于字线的导电层。 覆盖在导电层的阶梯表面上的电介质材料部分中的通孔可以用导电材料填充并凹入以形成接触通孔结构。 在凹部中形成下部有源区后，可以形成栅极并图案化以在覆盖接触通孔结构的区域中形成开口。 可以在开口的侧壁上形成栅极电介质，并且可以在栅电极的开口内部形成晶体管沟道。 上部有源区可以形成在晶体管通道上。

公开(公告)号：US09281314B1

公开(公告)日：2016-03-08

申请号：US14511834

申请日：2014-10-10

申请人： SanDisk Technologies Inc.

发明人： Takashi Kashimura ,  Xiaolong Hu ,  Sayako Nagamine ,  Yusuke Yoshida ,  Hiroaki Iuchi ,  Akira Nakada ,  Kazutaka Yoshizawa

IPC分类号： H01L29/792 ,  H01L21/336 ,  H01L27/115 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L21/285 ,  H01L21/28 ,  H01L21/02 ,  H01L21/764 ,  H01L21/311

CPC分类号： H01L27/1157 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/764 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76832 ,  H01L27/11524 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

摘要： Non-volatile storage devices and methods for fabricating non-volatile storage device are described. Sidewalls of the memory cells and their associated word line may be covered with silicon oxide. Silicon nitride covers the silicon oxide adjacent to the word lines, which may provide protection for the word lines during fabrication. However, silicon nitride can trap charges, which can degrade operation if the trapped charges are near a charge trapping region of a memory cell. Thus, the silicon nitride does not cover the silicon oxide adjacent to charge storage regions of the memory cells, which can improve device operation. For example, memory cell current may be increased. Techniques for forming such a device are also disclosed. One aspect includes a method that uses a sacrificial material to control formation of a silicon nitride layer when forming a memory device.

摘要翻译： 描述了用于制造非易失性存储装置的非易失性存储装置和方法。 存储器单元的侧壁及其相关联的字线可以用氧化硅覆盖。 氮化硅覆盖与字线相邻的氧化硅，这可以在制造期间为字线提供保护。 然而，氮化硅可以捕获电荷，如果捕获的电荷接近存储器单元的电荷捕获区域，则可能降低操作。 因此，氮化硅不覆盖与存储单元的电荷存储区域相邻的氧化硅，这可以改善器件工作。 例如，可以增加存储单元电流。 还公开了用于形成这种装置的技术。 一个方面包括在形成存储器件时使用牺牲材料来控制氮化硅层的形成的方法。