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1.
公开(公告)号:US20180197876A1
公开(公告)日:2018-07-12
申请号:US15401426
申请日:2017-01-09
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Chun GE , Yanli ZHANG , Johann ALSMEIER , Fabo YU , Jixin YU
IPC: H01L27/11582 , H01L27/1157 , H01L27/11573 , H01L27/11524 , H01L27/11556 , H01L27/11529 , H01L23/522 , H01L23/528
CPC classification number: H01L27/11582 , H01L23/5226 , H01L23/5283 , H01L27/11524 , H01L27/11529 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L27/11575
Abstract: After formation of an alternating stack of insulating layers and sacrificial material layers, a memory opening can be formed through the alternating stack, which is subsequently filled with a columnar semiconductor pedestal portion and a memory stack structure. Breakage of the columnar semiconductor pedestal portion under mechanical stress can be avoided by growing a laterally protruding semiconductor portion by selective deposition of a semiconductor material after removal of the sacrificial material layers to form backside recesses. At least an outer portion of the laterally protruding semiconductor portion can be oxidized to form a tubular semiconductor oxide spacer. Electrically conductive layers can be formed in the backside recesses to provide word lines for a three-dimensional memory device.
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公开(公告)号:US20180108671A1
公开(公告)日:2018-04-19
申请号:US15296380
申请日:2016-10-18
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Fabo YU , Jayavel PACHAMUTHU , Jongsun SEL , Tuan PHAM , Cheng-Chung CHU , Yao-Sheng LEE , Kensuke YAMAGUCHI , Masanori TERAHARA , Shuji MINAGAWA
IPC: H01L27/115 , H01L29/06 , H01L21/762
CPC classification number: H01L27/11575 , H01L21/76229 , H01L27/11548 , H01L27/11556 , H01L27/11582 , H01L29/0607 , H01L29/0649
Abstract: Memory openings and support openings can be formed through an alternating stack of insulating layers and sacrificial material layers. A set of dielectric layers and at least one semiconductor material layer can be sequentially deposited in each of the memory openings and the support openings. The at least one semiconductor material layer is removed from inside the support openings, while the at least one semiconductor material layer is not removed from inside the memory openings. Memory stack structures and support pillar structures are formed in the memory openings and the support openings, respectively. The sacrificial material layers are replaced with electrically conductive layers. Removal of the at least one semiconductor material layer from the support pillar structures reduces or eliminates leakage current through the support pillar structures.
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