FAST SCR STRUCTURE FOR ESD PROTECTION
    1.
    发明申请
    FAST SCR STRUCTURE FOR ESD PROTECTION 审中-公开
    用于ESD保护的快速SCR结构

    公开(公告)号:US20170077082A1

    公开(公告)日:2017-03-16

    申请号:US15251910

    申请日:2016-08-30

    Abstract: An ultra-low capacitance ESD protection device with an ultra-fast response time and a low turn-on voltage, and a high holding current. The device may include: a heavily-doped p-type substrate; a lightly-doped n-type epitaxial layer with a heavily-doped n-type buried layer; and a semiconductor-controlled rectifier (SCR) structure within the epitaxial layer. The SCR structure includes, between a ground terminal and a pad terminal: a shallow P+ region within a moderately-doped n-type well to form an emitter-base junction of a trigger transistor; a shallow N+ region within a moderately-doped p-type well to form an emitter-base junction of a latching transistor, and a PN junction coupled to either of the shallow regions as a forward-biased series diode. To reduce capacitance, the n-type and p-type wells are separated by a lightly-doped portion of the epitaxial layer having a small lateral dimension for enhanced switching speed.

    Abstract translation: 超低电容ESD保护器件具有超快的响应时间和低导通电压以及高保持电流。 该器件可以包括:重掺杂p型衬底; 具有重掺杂n型掩埋层的轻掺杂n型外延层; 和外延层内的半导体可控整流器(SCR)结构。 SCR结构包括在接地端子和焊盘端子之间:在中等掺杂的n型阱内的浅P +区域,以形成触发晶体管的发射极 - 基极结; 在中等掺杂的p型阱内形成浅N +区,以形成锁存晶体管的发射极 - 基极结,以及耦合到任何一个浅区的PN结作为正向偏置串联二极管。 为了减小电容,n型和p型阱由具有小横向尺寸的外延层的轻掺杂部分分开,以提高开关速度。

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

    公开(公告)号:US20240203975A1

    公开(公告)日:2024-06-20

    申请号:US18588372

    申请日:2024-02-27

    CPC classification number: H01L27/0248 H01L29/866

    Abstract: In an example, a semiconductor device includes a first steering diode and a second steering diode at a top side of a region of semiconductor material, a first Zener diode buried within the region of semiconductor material, and a second Zener diode at a bottom side of the region of semiconductor material. The semiconductor device is configured as a bi-directional electrostatic discharge (ESD) structure. The first Zener diode and the first steering diodes are configured to respond to a positive ESD pulse, and the second Zener diode and the second steering diode are configured to respond to a negative ESD pulse. The steering diodes are configured to have low capacitances and the Zener diodes are configured to provide enhanced ESD protection. Other related examples and methods are disclosed herein.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

    公开(公告)号:US20230253397A1

    公开(公告)日:2023-08-10

    申请号:US17650451

    申请日:2022-02-09

    CPC classification number: H01L27/0248 H01L29/866

    Abstract: In an example, a semiconductor device includes a first steering diode and a second steering diode at a top side of a region of semiconductor material, a first Zener diode buried within the region of semiconductor material, and a second Zener diode at a bottom side of the region of semiconductor material. The semiconductor device is configured as a bi-directional electrostatic discharge (ESD) structure. The first Zener diode and the first steering diodes are configured to respond to a positive ESD pulse, and the second Zener diode and the second steering diode are configured to respond to a negative ESD pulse. The steering diodes are configured to have low capacitances and the Zener diodes are configured to provide enhanced ESD protection. Other related examples and methods are disclosed herein.

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