SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

    公开(公告)号:US20230343777A1

    公开(公告)日:2023-10-26

    申请号:US17659993

    申请日:2022-04-20

    CPC classification number: H01L27/0262

    Abstract: In an example, a semiconductor device includes a region of semiconductor material with a buried doped region of a first conductivity type. A first well region of the first conductivity type is in the region of semiconductor material and is electrically coupled to the buried doped region. A second well region of a second conductivity type is in the region of semiconductor material and has a first peak dopant concentration. A third well region of the second conductivity type abuts edges of the second well region. The third well region is interposed between the first well region and the second well region and has a second peak dopant concentration that is different than the first peak dopant concentration. A doped anode region of the second conductivity type is in the first well region, a doped cathode region of the first conductivity type is in the second well region, and a doped contact region of the second conductivity type is in the second well region. The semiconductor device can be configured as a semiconductor-controlled rectifier (SCR) ESD device where the controlling mechanisms for DC breakdown voltage and holding voltage are decoupled. Other related examples and methods are disclosed herein.

    LATERAL SURGE PROTECTION DEVICES
    2.
    发明申请

    公开(公告)号:US20210118870A1

    公开(公告)日:2021-04-22

    申请号:US16948817

    申请日:2020-10-01

    Inventor: Yupeng CHEN

    Abstract: In a general aspect, an apparatus can include a semiconductor layer of a first conductivity type and a lateral bipolar device disposed in the semiconductor layer. The apparatus can further include an isolation trench disposed in the semiconductor layer in a base region of the lateral bipolar device. The isolation trench can be disposed between an emitter implant of the lateral bipolar device and a collector implant of the lateral bipolar device. The emitter implant and the collector implant can be of a second conductivity type, opposite the first conductivity type.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

    公开(公告)号:US20240203975A1

    公开(公告)日:2024-06-20

    申请号:US18588372

    申请日:2024-02-27

    CPC classification number: H01L27/0248 H01L29/866

    Abstract: In an example, a semiconductor device includes a first steering diode and a second steering diode at a top side of a region of semiconductor material, a first Zener diode buried within the region of semiconductor material, and a second Zener diode at a bottom side of the region of semiconductor material. The semiconductor device is configured as a bi-directional electrostatic discharge (ESD) structure. The first Zener diode and the first steering diodes are configured to respond to a positive ESD pulse, and the second Zener diode and the second steering diode are configured to respond to a negative ESD pulse. The steering diodes are configured to have low capacitances and the Zener diodes are configured to provide enhanced ESD protection. Other related examples and methods are disclosed herein.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

    公开(公告)号:US20230253397A1

    公开(公告)日:2023-08-10

    申请号:US17650451

    申请日:2022-02-09

    CPC classification number: H01L27/0248 H01L29/866

    Abstract: In an example, a semiconductor device includes a first steering diode and a second steering diode at a top side of a region of semiconductor material, a first Zener diode buried within the region of semiconductor material, and a second Zener diode at a bottom side of the region of semiconductor material. The semiconductor device is configured as a bi-directional electrostatic discharge (ESD) structure. The first Zener diode and the first steering diodes are configured to respond to a positive ESD pulse, and the second Zener diode and the second steering diode are configured to respond to a negative ESD pulse. The steering diodes are configured to have low capacitances and the Zener diodes are configured to provide enhanced ESD protection. Other related examples and methods are disclosed herein.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

    公开(公告)号:US20240387510A1

    公开(公告)日:2024-11-21

    申请号:US18777737

    申请日:2024-07-19

    Abstract: In an example, a semiconductor device includes a semiconductor substrate of a first conductivity type and a semiconductor region of the first conductivity type over the semiconductor substrate. A well region of a second conductivity type is in the semiconductor region. A doped region of the first conductivity type is in the well region. A doped region of the second conductivity type is in the well region. A doped region of the second conductivity type is in the semiconductor substrate at a bottom side. A doped region of the first conductivity type is in the semiconductor substrate at the bottom side. A first conductor is at a top side of the semiconductor region and a second conductor is at the bottom side. In some examples, one or more of doped regions at the bottom side is a patterned doped region.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

    公开(公告)号:US20230361107A1

    公开(公告)日:2023-11-09

    申请号:US17662263

    申请日:2022-05-06

    CPC classification number: H01L27/0262 H01L27/0928

    Abstract: In an example, a semiconductor device includes a semiconductor substrate of a first conductivity type and a semiconductor region of the first conductivity type over the semiconductor substrate. A well region of a second conductivity type is in the semiconductor region. A doped region of the first conductivity type is in the well region. A doped region of the second conductivity type is in the well region. A doped region of the second conductivity type is in the semiconductor substrate at a bottom side. A doped region of the first conductivity type is in the semiconductor substrate at the bottom side. A first conductor is at a top side of the semiconductor region and a second conductor is at the bottom side. In some examples, one or more of doped regions at the bottom side is a patterned doped region.

    INTERFERENCE FILTER AND ELECTROSTATIC DISCHARGE / ELECTRICAL SURGE PROTECTION CIRCUIT AND DEVICE

    公开(公告)号:US20220399717A1

    公开(公告)日:2022-12-15

    申请号:US17804692

    申请日:2022-05-31

    Inventor: Yupeng CHEN

    Abstract: In some aspects, the techniques described herein relate to an electromagnetic interference (EMI) filter circuit including: an input terminal; an output terminal; an electrical ground terminal; a resistor electrically coupled between the input terminal and the output terminal; a first bipolar transistor including: a collector terminal electrically coupled with the input terminal; an emitter terminal electrically coupled with the electrical ground terminal; and a base terminal that is electrically floating; and a second bipolar transistor including: a collector terminal electrically coupled with the output terminal; an emitter terminal electrically coupled with the electrical ground terminal; and a base terminal that is electrically floating.

    ZENER DIODES AND METHODS OF MANUFACTURE
    10.
    发明申请

    公开(公告)号:US20200227402A1

    公开(公告)日:2020-07-16

    申请号:US16249553

    申请日:2019-01-16

    Abstract: In a general aspect, a semiconductor device can include a heavily-doped substrate of a first conductivity type, a lightly-doped epitaxial layer of a second conductivity type disposed on the heavily-doped substrate, and a heavily-doped epitaxial layer of the second conductivity type disposed on the lightly-doped epitaxial layer. The heavily-doped epitaxial layer can have a doping concentration that is greater than a doping concentration of the lightly-doped epitaxial layer. At least a portion of the heavily-doped substrate can be included in a first terminal of a Zener diode, and at least a portion of the lightly-doped epitaxial layer and at least a portion of the heavily-doped epitaxial layer can be included in a second terminal of the Zener diode. The semiconductor device can further include a termination trench that extends through the heavily-doped epitaxial layer and the lightly-doped epitaxial layer, and terminates in the heavily-doped substrate.

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