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公开(公告)号：US10891894B2
公开(公告)日：2021-01-12
申请号：US15818806
申请日：2017-11-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hajime Kimura , Yoshifumi Tanada
IPC: G09G3/3225 , G09G3/3233 , G09G3/3266 , G09G3/3283 , G09G3/3291 , G09G3/20
Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop. A desired drain current can thus be supplied to the EL device even if there is dispersion in the threshold values of the TFTs among pixels, because this is offset by the threshold value of the TFT.
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公开(公告)号：US20200082895A1
公开(公告)日：2020-03-12
申请号：US16576836
申请日：2019-09-20
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Munehiro Azami , Shou Nagao , Yoshifumi Tanada
IPC: G11C19/28 , H01L27/12 , G02F1/133 , G09G3/36 , G02F1/1333
Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node a rises. When the potential of the node α reaches (VDD−VthN), the node α became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
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公开(公告)号：US10424390B2
公开(公告)日：2019-09-24
申请号：US16162480
申请日：2018-10-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Munehiro Azami , Shou Nagao , Yoshifumi Tanada
IPC: G09G3/36 , G11C19/28 , G02F1/1333 , G02F1/133 , H01L27/12
Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node α rises. When the potential of the node α reaches (VDD−VthN), the node α became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
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公开(公告)号：US10373550B2
公开(公告)日：2019-08-06
申请号：US16027892
申请日：2018-07-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Mitsuaki Osame , Aya Anzai , Yoshifumi Tanada , Keisuke Miyagawa , Satoshi Seo , Shunpei Yamazaki
IPC: G09G3/32 , H01L33/00 , G09G3/3233 , G09G3/3258 , G09G3/3266 , G09G3/3291
Abstract: A light emitting device that achieves long life, and which is capable of performing high duty drive, by suppressing initial light emitting element deterioration is provided. Reverse bias application to an EL element (109) is performed one row at a time by forming a reverse bias electric power source line (112) and a reverse bias TFT (108). Reverse bias application can therefore be performed in synchronous with operations for write-in of an image signal, light emission, erasure, and the like. Reverse bias application therefore becomes possible while maintaining a duty equivalent to that of a conventional driving method.
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公开(公告)号：US20190147969A1
公开(公告)日：2019-05-16
申请号：US16162480
申请日：2018-10-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Munehiro Azami , Shou Nagao , Yoshifumi Tanada
IPC: G11C19/28 , G02F1/1333 , G02F1/133 , G09G3/36 , H01L27/12
CPC classification number: G11C19/28 , G02F1/13306 , G02F1/1333 , G09G3/36 , G09G3/3688 , G09G2310/0286 , G09G2330/021 , H01L27/1214 , H01L27/124
Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node α rises. When the potential of the node α reaches (VDD−VthN), the node α became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
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Patent Agency Ranking
公开(公告)号：US20180122492A1
公开(公告)日：2018-05-03
申请号：US15802524
申请日：2017-11-03
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Munehiro Azami , Shou Nagao , Yoshifumi Tanada
IPC: G11C19/28 , G09G3/36 , H01L27/12 , G02F1/133 , G02F1/1333
CPC classification number: G11C19/28 , G02F1/13306 , G02F1/1333 , G09G3/36 , G09G3/3688 , G09G2310/0286 , G09G2330/021 , H01L27/1214 , H01L27/124
Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node α rises. When the potential of the node α reaches (VDD−VthN), the node α became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
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公开(公告)号：US09307611B2
公开(公告)日：2016-04-05
申请号：US13890357
申请日：2013-05-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Yoshifumi Tanada
CPC classification number: H05B37/00 , G09G3/2022 , G09G3/3659 , G09G2300/0857
Abstract: An object is to enable application of forward/reverse voltage to or forward/reverse current to a display element and to lower power consumption of a driver circuit for driving a pixel. A memory storing the potential of a source signal line input through a switch, a first transistor whose gate is supplied with one output of the memory, a second transistor whose gate is supplied with the other output of the memory, a display element electrically connected to one of a source a drain of a first transistor and one of a source and a drain of a second transistor, a power source line electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the second transistor, and a counter power source electrically connected to the display element are included.
Abstract translation: 目的是使能向显示元件施加正向/反向电压或正向/反向电流，并降低用于驱动像素的驱动电路的功耗。 存储存储通过开关输入的源极信号线的电位的存储器，其栅极被提供有存储器的一个输出的第一晶体管，其栅极被提供有存储器的另一个输出的第二晶体管，显示元件电连接到 源极之一，第一晶体管的漏极和第二晶体管的源极和漏极中的一个，电源线，其电连接到第一晶体管的源极和漏极中的另一个，以及源极和源极的另一个 包括第二晶体管的漏极和电连接到显示元件的反电源。
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公开(公告)号：US09293477B2
公开(公告)日：2016-03-22
申请号：US14618261
申请日：2015-02-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei Yamazaki , Masahiko Hayakawa , Yoshifumi Tanada , Mitsuaki Osame , Aya Anzai , Ryota Fukumoto
CPC classification number: H01L27/3262 , G09G3/3233 , G09G2310/0251 , G09G2330/04 , H01L27/0248 , H01L27/12 , H01L27/1214 , H01L27/1222 , H01L27/1255 , H01L27/3248 , H01L27/3265 , H01L27/3276 , H01L29/78675
Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.
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公开(公告)号：US20150340378A1
公开(公告)日：2015-11-26
申请号：US14816124
申请日：2015-08-03
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Munehiro Azami , Shou Nagao , Yoshifumi Tanada
CPC classification number: G11C19/28 , G02F1/13306 , G02F1/1333 , G09G3/36 , G09G3/3688 , G09G2310/0286 , G09G2330/021 , H01L27/1214 , H01L27/124
Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node α rises. When the potential of the node α reaches (VDD−VthN), the node α became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
Abstract translation: 脉冲被输入到TFT 101和104，使得TFT将导通，然后节点α的电位上升。 当节点α的电位达到（VDD-VthN）时，节点α变为浮动状态。 因此，TFT 105然后导通，并且输出节点的电位随着时钟信号达到电平H而上升。另一方面，由于电容107的操作，TFT 105的栅电极的电位进一步上升， 输出节点的电位上升，使得输出节点的电位将高于（VDD + VthN）。 因此，由TFT 105的阈值引起的电压下降，输出节点的电位上升到VDD。
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公开(公告)号：US08994622B2
公开(公告)日：2015-03-31
申请号：US13949317
申请日：2013-07-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hajime Kimura , Yoshifumi Tanada
CPC classification number: H01L27/3276 , G09G3/20 , G09G3/2011 , G09G3/2022 , G09G3/2077 , G09G3/30 , G09G3/3233 , G09G3/3258 , G09G3/3266 , G09G3/3275 , G09G3/3283 , G09G3/3291 , G09G3/3648 , G09G2300/0408 , G09G2300/0426 , G09G2300/043 , G09G2300/0819 , G09G2300/0842 , G09G2300/0852 , G09G2300/0861 , G09G2310/027 , G09G2310/0286 , G09G2310/08 , G09G2320/0233 , G09G2320/043 , H01L27/3262 , H01L27/3265
Abstract: Display irregularities in light emitting devices, which develop due to dispersions per pixel in the threshold value of TFTs for supplying electric current to light emitting elements, are obstacles to increasing the image quality of the light emitting devices. An electric potential in which the threshold voltage of a TFT (105) is either added to or subtracted from the electric potential of a reset signal line (110) is stored in capacitor means (108). A voltage, in which the corresponding threshold voltage is added to an image signal, is applied to a gate electrode of a TFT (106). TFTs within a pixel are disposed adjacently, and dispersion in the characteristics of the TFTs does not easily develop. The threshold value of the TFT (105) is thus cancelled, even if the threshold values of the TFTs (106) differ per pixel, and a predetermined drain current can be supplied to an EL element (109).
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